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SubjectRe: [PATCH v3 8/9] i2c: piix4: Add EFCH MMIO support for SMBus port select
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On 1/20/22 5:28 AM, Andy Shevchenko wrote:
> On Thu, Jan 20, 2022 at 1:08 AM Terry Bowman <terry.bowman@amd.com> wrote:
>>
>> AMD processors include registers capable of selecting between 2 SMBus
>> ports. Port selection is made during each user access by writing to
>> FCH::PM::DECODEEN[smbus0sel]. Change the driver to use MMIO during
>> SMBus port selection because cd6h/cd7h port I/O is not available on
>> later AMD processors.
>
> ...
>
>> }
>> +
>> /*
>
> Stray change.
>
>

I'll remove it.

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