Messages in this thread | | | Date | Thu, 20 Jan 2022 14:13:06 +0100 | Subject | Re: [PATCH v2 5/7] kvm/riscv: rework guest entry logic | From | Paolo Bonzini <> |
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On 1/20/22 13:56, Mark Rutland wrote: >> This should be the required architectural behavior: "a CSR access is >> performed after the execution of any prior instructions in program order >> whose behavior modifies or is modified by the CSR state and before the >> execution of any subsequent instructions in program order whose behavior >> modifies or is modified by the CSR state" (Zicsr spec, paragraph "CSR Access >> Ordering", available at >> https://www.five-embeddev.com/riscv-isa-manual/latest/csr.html#csrinsts). > > I think that's necessary, but not sufficient. > > IIUC that wording means that writes to the CSR state occur in program order > without requiring additional barriers to take effect. The current value of the > CSR determines whether interrupts *can* be taken, but that doesn't say that > pending interrrupts *must* be taken immediately when unmasked in the CSR.
I see. Yeah, my reasoning was that there would be _different_ instructions executed after the CSR write if an interrupt has to be taken, but perhaps that's a bit of a stretch.
Paolo
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