Messages in this thread | | | From | Andy Shevchenko <> | Date | Thu, 20 Jan 2022 13:28:09 +0200 | Subject | Re: [PATCH v3 8/9] i2c: piix4: Add EFCH MMIO support for SMBus port select |
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On Thu, Jan 20, 2022 at 1:08 AM Terry Bowman <terry.bowman@amd.com> wrote: > > AMD processors include registers capable of selecting between 2 SMBus > ports. Port selection is made during each user access by writing to > FCH::PM::DECODEEN[smbus0sel]. Change the driver to use MMIO during > SMBus port selection because cd6h/cd7h port I/O is not available on > later AMD processors.
...
> } > + > /*
Stray change.
-- With Best Regards, Andy Shevchenko
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