Messages in this thread | | | Subject | Re: [PATCH] dt-bindings: Improve phandle-array schemas | From | Arnaud POULIQUEN <> | Date | Wed, 19 Jan 2022 16:21:32 +0100 |
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Hello Rob,
On 1/19/22 2:50 AM, Rob Herring wrote: > The 'phandle-array' type is a bit ambiguous. It can be either just an > array of phandles or an array of phandles plus args. Many schemas for > phandle-array properties aren't clear in the schema which case applies > though the description usually describes it. > > The array of phandles case boils down to needing: > > items: > maxItems: 1 > > The phandle plus args cases should typically take this form: > > items: > - items: > - description: A phandle > - description: 1st arg cell > - description: 2nd arg cell > > With this change, some examples need updating so that the bracketing of > property values matches the schema. > > Cc: Damien Le Moal <damien.lemoal@opensource.wdc.com> > Cc: Herbert Xu <herbert@gondor.apana.org.au> > Cc: "David S. Miller" <davem@davemloft.net> > Cc: Chun-Kuang Hu <chunkuang.hu@kernel.org> > Cc: Philipp Zabel <p.zabel@pengutronix.de> > Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > Cc: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> > Cc: Vinod Koul <vkoul@kernel.org> > Cc: Georgi Djakov <djakov@kernel.org> > Cc: Thomas Gleixner <tglx@linutronix.de> > Cc: Marc Zyngier <maz@kernel.org> > Cc: Joerg Roedel <joro@8bytes.org> > Cc: Lee Jones <lee.jones@linaro.org> > Cc: Daniel Thompson <daniel.thompson@linaro.org> > Cc: Jingoo Han <jingoohan1@gmail.com> > Cc: Pavel Machek <pavel@ucw.cz> > Cc: Mauro Carvalho Chehab <mchehab@kernel.org> > Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> > Cc: Jakub Kicinski <kuba@kernel.org> > Cc: Wolfgang Grandegger <wg@grandegger.com> > Cc: Marc Kleine-Budde <mkl@pengutronix.de> > Cc: Andrew Lunn <andrew@lunn.ch> > Cc: Vivien Didelot <vivien.didelot@gmail.com> > Cc: Florian Fainelli <f.fainelli@gmail.com> > Cc: Vladimir Oltean <olteanv@gmail.com> > Cc: Kalle Valo <kvalo@kernel.org> > Cc: Viresh Kumar <vireshk@kernel.org> > Cc: Stephen Boyd <sboyd@kernel.org> > Cc: Kishon Vijay Abraham I <kishon@ti.com> > Cc: Linus Walleij <linus.walleij@linaro.org> > Cc: "Rafael J. Wysocki" <rafael@kernel.org> > Cc: Kevin Hilman <khilman@kernel.org> > Cc: Ulf Hansson <ulf.hansson@linaro.org> > Cc: Sebastian Reichel <sre@kernel.org> > Cc: Mark Brown <broonie@kernel.org> > Cc: Mathieu Poirier <mathieu.poirier@linaro.org> > Cc: Daniel Lezcano <daniel.lezcano@linaro.org> > Cc: Zhang Rui <rui.zhang@intel.com> > Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> > Cc: Thierry Reding <thierry.reding@gmail.com> > Cc: Jonathan Hunter <jonathanh@nvidia.com> > Cc: Sudeep Holla <sudeep.holla@arm.com> > Cc: Geert Uytterhoeven <geert+renesas@glider.be> > Cc: linux-ide@vger.kernel.org > Cc: linux-crypto@vger.kernel.org > Cc: dri-devel@lists.freedesktop.org > Cc: dmaengine@vger.kernel.org > Cc: linux-pm@vger.kernel.org > Cc: iommu@lists.linux-foundation.org > Cc: linux-leds@vger.kernel.org > Cc: linux-media@vger.kernel.org > Cc: netdev@vger.kernel.org > Cc: linux-can@vger.kernel.org > Cc: linux-wireless@vger.kernel.org > Cc: linux-phy@lists.infradead.org > Cc: linux-gpio@vger.kernel.org > Cc: linux-riscv@lists.infradead.org > Cc: linux-remoteproc@vger.kernel.org > Cc: alsa-devel@alsa-project.org > Cc: linux-usb@vger.kernel.org > Signed-off-by: Rob Herring <robh@kernel.org> > ---
[...]
> .../bindings/remoteproc/st,stm32-rproc.yaml | 33 ++++++--
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> diff --git a/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml > index b587c97c282b..be3d9b0e876b 100644 > --- a/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml > +++ b/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml > @@ -29,17 +29,22 @@ properties: > > st,syscfg-holdboot: > description: remote processor reset hold boot > - - Phandle of syscon block. > - - The offset of the hold boot setting register. > - - The field mask of the hold boot. > $ref: "/schemas/types.yaml#/definitions/phandle-array" > - maxItems: 1 > + items: > + - items: > + - description: Phandle of syscon block > + - description: The offset of the hold boot setting register > + - description: The field mask of the hold boot > > st,syscfg-tz: > description: > Reference to the system configuration which holds the RCC trust zone mode > $ref: "/schemas/types.yaml#/definitions/phandle-array" > - maxItems: 1 > + items: > + - items: > + - description: Phandle of syscon block > + - description: FIXME > + - description: FIXME
- description: The offset of the trust zone setting register - description: The field mask of the trust zone state
> > interrupts: > description: Should contain the WWDG1 watchdog reset interrupt > @@ -93,20 +98,32 @@ properties: > $ref: "/schemas/types.yaml#/definitions/phandle-array" > description: | > Reference to the system configuration which holds the remote > - maxItems: 1 > + items: > + - items: > + - description: Phandle of syscon block > + - description: FIXME > + - description: FIXME
- description: The offset of the power setting register - description: The field mask of the PDDS selection
> > st,syscfg-m4-state: > $ref: "/schemas/types.yaml#/definitions/phandle-array" > description: | > Reference to the tamp register which exposes the Cortex-M4 state. > - maxItems: 1 > + items: > + - items: > + - description: Phandle of syscon block with the tamp register > + - description: FIXME > + - description: FIXME
- description: The offset of the tamp register - description: The field mask of the Cortex-M4 state
> > st,syscfg-rsc-tbl: > $ref: "/schemas/types.yaml#/definitions/phandle-array" > description: | > Reference to the tamp register which references the Cortex-M4 > resource table address. > - maxItems: 1 > + items: > + - items: > + - description: Phandle of syscon block with the tamp register > + - description: FIXME > + - description: FIXME
- description: The offset of the tamp register - description: The field mask of the Cortex-M4 resource table address
Please tell me if you prefer that I fix this in a dedicated patch.
Thanks, Arnaud
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