Messages in this thread | | | Date | Tue, 18 Jan 2022 15:15:51 +0100 | Subject | Re: [PATCH 0/5] kvm: fix latent guest entry/exit bugs | From | Christian Borntraeger <> |
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Am 18.01.22 um 14:12 schrieb Mark Rutland: > On Tue, Jan 18, 2022 at 01:42:26PM +0100, Christian Borntraeger wrote: >> >> >> Am 18.01.22 um 13:02 schrieb Mark Rutland: >>> On Mon, Jan 17, 2022 at 06:45:36PM +0100, Paolo Bonzini wrote: >>>> On 1/14/22 16:19, Mark Rutland wrote: >>>>> I also think there is another issue here. When an IRQ is taken from SIE, will >>>>> user_mode(regs) always be false, or could it be true if the guest userspace is >>>>> running? If it can be true I think tha context tracking checks can complain, >>>>> and it*might* be possible to trigger a panic(). >>>> >>>> I think that it would be false, because the guest PSW is in the SIE block >>>> and switched on SIE entry and exit, but I might be incorrect. >>> >>> Ah; that's the crux of my confusion: I had thought the guest PSW would >>> be placed in the regular lowcore *_old_psw slots. From looking at the >>> entry asm it looks like the host PSW (around the invocation of SIE) is >>> stored there, since that's what the OUTSIDE + SIEEXIT handling is >>> checking for. >>> >>> Assuming that's correct, I agree this problem doesn't exist, and there's >>> only the common RCU/tracing/lockdep management to fix. >> >> Will you provide an s390 patch in your next iteration or shall we then do >> one as soon as there is a v2? We also need to look into vsie.c where we >> also call sie64a > > I'm having a go at that now; my plan is to try to have an s390 patch as > part of v2 in the next day or so. > > Now that I have a rough idea of how SIE and exception handling works on > s390, I think the structural changes to kvm-s390.c:__vcpu_run() and > vsie.c:do_vsie_run() are fairly simple. > > The only open bit is exactly how/where to identify when the interrupt > entry code needs to wake RCU. I can add a per-cpu variable or thread > flag to indicate that we're inside that EQS, or or I could move the irq > enable/disable into the sie64a asm and identify that as with the OUTSIDE > macro in the entry asm. What exactly would the low-level interrupt handler need to do?
CC Sven, Heiko for the entry.S changes.
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