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    Subject[PATCH AUTOSEL 5.16 187/217] mfd: intel_soc_pmic: Use CPU-id check instead of _HRV check to differentiate variants
    Date
    From: Hans de Goede <hdegoede@redhat.com>

    [ Upstream commit 5b78223f55a0f516a1639dbe11cd4324d4aaee20 ]

    The Intel Crystal Cove PMIC has 2 different variants, one for use with
    Bay Trail (BYT) SoCs and one for use with Cherry Trail (CHT) SoCs.

    So far we have been using an ACPI _HRV check to differentiate between
    the 2, but at least on the Microsoft Surface 3, which is a CHT device,
    the wrong _HRV value is reported by ACPI.

    So instead switch to a CPU-ID check which prevents us from relying on
    the possibly wrong ACPI _HRV value.

    Signed-off-by: Hans de Goede <hdegoede@redhat.com>
    Reported-by: Tsuchiya Yuto <kitakar@gmail.com>
    Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
    Signed-off-by: Lee Jones <lee.jones@linaro.org>
    Link: https://lore.kernel.org/r/20211206174806.197772-2-hdegoede@redhat.com
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/mfd/intel_soc_pmic_core.c | 28 +++-------------------------
    1 file changed, 3 insertions(+), 25 deletions(-)

    diff --git a/drivers/mfd/intel_soc_pmic_core.c b/drivers/mfd/intel_soc_pmic_core.c
    index ddd64f9e3341e..47cb7f00dfcfc 100644
    --- a/drivers/mfd/intel_soc_pmic_core.c
    +++ b/drivers/mfd/intel_soc_pmic_core.c
    @@ -14,15 +14,12 @@
    #include <linux/module.h>
    #include <linux/mfd/core.h>
    #include <linux/mfd/intel_soc_pmic.h>
    +#include <linux/platform_data/x86/soc.h>
    #include <linux/pwm.h>
    #include <linux/regmap.h>

    #include "intel_soc_pmic_core.h"

    -/* Crystal Cove PMIC shares same ACPI ID between different platforms */
    -#define BYT_CRC_HRV 2
    -#define CHT_CRC_HRV 3
    -
    /* PWM consumed by the Intel GFX */
    static struct pwm_lookup crc_pwm_lookup[] = {
    PWM_LOOKUP("crystal_cove_pwm", 0, "0000:00:02.0", "pwm_pmic_backlight", 0, PWM_POLARITY_NORMAL),
    @@ -34,31 +31,12 @@ static int intel_soc_pmic_i2c_probe(struct i2c_client *i2c,
    struct device *dev = &i2c->dev;
    struct intel_soc_pmic_config *config;
    struct intel_soc_pmic *pmic;
    - unsigned long long hrv;
    - acpi_status status;
    int ret;

    - /*
    - * There are 2 different Crystal Cove PMICs a Bay Trail and Cherry
    - * Trail version, use _HRV to differentiate between the 2.
    - */
    - status = acpi_evaluate_integer(ACPI_HANDLE(dev), "_HRV", NULL, &hrv);
    - if (ACPI_FAILURE(status)) {
    - dev_err(dev, "Failed to get PMIC hardware revision\n");
    - return -ENODEV;
    - }
    -
    - switch (hrv) {
    - case BYT_CRC_HRV:
    + if (soc_intel_is_byt())
    config = &intel_soc_pmic_config_byt_crc;
    - break;
    - case CHT_CRC_HRV:
    + else
    config = &intel_soc_pmic_config_cht_crc;
    - break;
    - default:
    - dev_warn(dev, "Unknown hardware rev %llu, assuming BYT\n", hrv);
    - config = &intel_soc_pmic_config_byt_crc;
    - }

    pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL);
    if (!pmic)
    --
    2.34.1
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