Messages in this thread | | | Date | Fri, 14 Jan 2022 13:28:46 +0530 | From | "Naveen N. Rao" <> | Subject | Re: [PATCH] powerpc/bpf: Always reallocate BPF_REG_5, BPF_REG_AX and TMP_REG when possible |
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Christophe Leroy wrote: > BPF_REG_5, BPF_REG_AX and TMP_REG are mapped on non volatile registers > because there are not enough volatile registers, but they don't need > to be preserved on function calls. > > So when some volatile registers become available, those registers can > always be reallocated regardless of whether SEEN_FUNC is set or not. > > Suggested-by: Naveen N. Rao <naveen.n.rao@linux.ibm.com> > Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> > --- > arch/powerpc/net/bpf_jit.h | 3 --- > arch/powerpc/net/bpf_jit_comp32.c | 14 +++++++++++--- > 2 files changed, 11 insertions(+), 6 deletions(-) > > diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h > index b20a2a83a6e7..b75507fc8f6b 100644 > --- a/arch/powerpc/net/bpf_jit.h > +++ b/arch/powerpc/net/bpf_jit.h > @@ -127,9 +127,6 @@ > #define SEEN_FUNC 0x20000000 /* might call external helpers */ > #define SEEN_TAILCALL 0x40000000 /* uses tail calls */ > > -#define SEEN_VREG_MASK 0x1ff80000 /* Volatile registers r3-r12 */ > -#define SEEN_NVREG_MASK 0x0003ffff /* Non volatile registers r14-r31 */ > - > #ifdef CONFIG_PPC64 > extern const int b2p[MAX_BPF_JIT_REG + 2]; > #else > diff --git a/arch/powerpc/net/bpf_jit_comp32.c b/arch/powerpc/net/bpf_jit_comp32.c > index d3a52cd42f53..cfec42c8a511 100644 > --- a/arch/powerpc/net/bpf_jit_comp32.c > +++ b/arch/powerpc/net/bpf_jit_comp32.c > @@ -77,14 +77,22 @@ static int bpf_jit_stack_offsetof(struct codegen_context *ctx, int reg) > return BPF_PPC_STACKFRAME(ctx) - 4; > } > > +#define SEEN_VREG_MASK 0x1ff80000 /* Volatile registers r3-r12 */ > +#define SEEN_NVREG_FULL_MASK 0x0003ffff /* Non volatile registers r14-r31 */ > +#define SEEN_NVREG_TEMP_MASK 0x00001e01 /* BPF_REG_5, BPF_REG_AX, TMP_REG */
Could have been named better: SEEN_NVREG_BPF_VGER_MASK, or such. Apart from that: Reviewed-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
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