Messages in this thread | | | Date | Fri, 14 Jan 2022 18:27:37 +0800 | From | Xin Ji <> | Subject | Re: [v9,3/3] drm/bridge: anx7625: config hs packets end aligned to avoid screen shift |
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Hi Rex-BC Chen, thanks for your patch, it is OK for me.
Reviewed-by: Xin Ji <xji@analogixsemi.com>
Thanks, Xin
On Fri, Jan 14, 2022 at 05:21:10PM +0800, Rex-BC Chen wrote: > This device requires the packets on lanes aligned at the end to fix > screen shift or scroll. > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> > --- > drivers/gpu/drm/bridge/analogix/anx7625.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c > index 2346dbcc505f..fe32ab0878ae 100644 > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c > @@ -1673,7 +1673,8 @@ static int anx7625_attach_dsi(struct anx7625_data *ctx) > dsi->format = MIPI_DSI_FMT_RGB888; > dsi->mode_flags = MIPI_DSI_MODE_VIDEO | > MIPI_DSI_MODE_VIDEO_SYNC_PULSE | > - MIPI_DSI_MODE_VIDEO_HSE; > + MIPI_DSI_MODE_VIDEO_HSE | > + MIPI_DSI_HS_PKT_END_ALIGNED; > > ret = devm_mipi_dsi_attach(dev, dsi); > if (ret) { > -- > 2.18.0
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