Messages in this thread | | | Subject | Re: [PATCH 0/6] x86/insn: Add instructions to instruction decoder | From | Adrian Hunter <> | Date | Thu, 13 Jan 2022 08:52:58 +0200 |
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On 03/01/2022 20:30, Arnaldo Carvalho de Melo wrote: > Em Mon, Jan 03, 2022 at 03:22:59PM -0300, Arnaldo Carvalho de Melo escreveu: >> Em Mon, Jan 03, 2022 at 05:40:00PM +0200, Adrian Hunter escreveu: >>> On 03/01/2022 17:01, Arnaldo Carvalho de Melo wrote: >>>> Em Mon, Jan 03, 2022 at 11:56:08AM -0300, Arnaldo Carvalho de Melo escreveu: >>>> So since this needs rebasing, could you please split it into two >>>> patchsets, one for tools/ and another for arch and send two batches? >>>> This way I'll pick the tools/ one, the x86 maintainers the other bits. > >>>> Otherwise the x86 maintainers would have to test if the tools/ bits >>>> works as expected, etc. > >>> It seems not to be happening for me. What tree/branch is it? > >> tmp.perf/core > >> https://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git/log/?h=tmp.perf/core > >> I merged torvalds/master today, but it should work as that file was last >> changed looong ago: > >> ⬢[acme@toolbox perf]$ git log arch/x86/lib/x86-opcode-map.txt | head >> commit 5790921bc18b1eb5c0c61371e31114fd4c4b0154 >> Author: Yu-cheng Yu <yu-cheng.yu@intel.com> >> Date: Tue Feb 4 09:14:24 2020 -0800 >> >> x86/insn: Add Control-flow Enforcement (CET) instructions to the opcode map >> >> Add the following CET instructions to the opcode map: >> >> INCSSP: >> Increment Shadow Stack pointer (SSP). >> ⬢[acme@toolbox perf]$ >> >> Perhaps related to b4? I'll try updating it and retrying... > > Now it should work: > > ⬢[acme@toolbox perf]$ b4 am -ctsl --cc-trailers c7ac518e-82fb-eb51-7778-5e9b1aaed9a9@intel.com > <SNIP> > Cover: ./20211202_adrian_hunter_x86_insn_add_instructions_to_instruction_decoder.cover > Link: https://lore.kernel.org/r/20211202095029.2165714-1-adrian.hunter@intel.com > Base: applies clean to current tree > git checkout -b 20211202_adrian_hunter_intel_com HEAD > git am ./20211202_adrian_hunter_x86_insn_add_instructions_to_instruction_decoder.mbx > ⬢[acme@toolbox perf]$ > > Lets see... > > ⬢[acme@toolbox perf]$ git am ./20211202_adrian_hunter_x86_insn_add_instructions_to_instruction_decoder.mbx > Applying: perf tests: Add AMX instructions to x86 instruction decoder test > Applying: x86/insn: Add AMX instructions to x86 instruction decoder > Applying: perf tests: Add misc instructions to x86 instruction decoder test > Applying: x86/insn: Add misc instructions to x86 instruction decoder > Applying: perf tests: Add AVX512-FP16 instructions to x86 instruction decoder test > Applying: x86/insn: Add AVX512-FP16 instructions to x86 instruction decoder > ⬢[acme@toolbox perf]$ > > Yeah, it works, builds and the 'perf test instr' test case succeeds, so > if Peter or Borislav so wishes please process this patchkit as-is: > > Acked-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Peter or Borislav, could these patches be considered as a late inclusion for v5.17?
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