Messages in this thread Patch in this message | | | From | Yann Gautier <> | Subject | [PATCH 05/10] ARM: dts: stm32: update SDMMC clock slew-rate on STM32MP135F-DK board | Date | Wed, 12 Jan 2022 17:32:21 +0100 |
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Add sdmmc1_clk_pins_a in sdmmc1 pinctrl nodes, to properly manage clock slew-rate.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> --- arch/arm/boot/dts/stm32mp135f-dk.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/stm32mp135f-dk.dts b/arch/arm/boot/dts/stm32mp135f-dk.dts index 7e96d9e36217..aae8d3512f4b 100644 --- a/arch/arm/boot/dts/stm32mp135f-dk.dts +++ b/arch/arm/boot/dts/stm32mp135f-dk.dts @@ -39,8 +39,8 @@ &sdmmc1 { pinctrl-names = "default", "opendrain"; - pinctrl-0 = <&sdmmc1_b4_pins_a>; - pinctrl-1 = <&sdmmc1_b4_od_pins_a>; + pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>; + pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_clk_pins_a>; broken-cd; disable-wp; st,neg-edge; -- 2.17.1
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