Messages in this thread | | | Subject | Re: [RFC PATCH 0/1] perf tools: Add 'm' event modifier for counting | From | Jessica Clarke <> | Date | Tue, 11 Jan 2022 14:29:15 +0000 |
| |
On 11 Jan 2022, at 14:20, Nikita Shubin <nikita.shubin@maquefel.me> wrote: > > From: Nikita Shubin <n.shubin@yadro.com> > > This patch is a proposal to add Machine Mode modifier that is currently > available only for RISC-V for perf tool. > > We don't currently have a level that is lower than kernel, so i don't > see we can reuse something existing for this purpose. > > The exclude_machine bit seems harmless to as no one will proccess it apart > of riscv.
Armv8 has equivalent bits in PMEVTYPER<n>_EL0 and PMCCFILTR_EL0 for EL-based filtering, which includes filtering EL3.
Jess
> Patch depends on Atish Patra PMU series: > https://lwn.net/Articles/879905/ > + some modifications to pass execlude event to SBI PMU extension > > Tested with qemu. > > Nikita Shubin (1): > perf tools: Add 'm' event modifier for counting machine > > include/uapi/linux/perf_event.h | 3 ++- > tools/include/uapi/linux/perf_event.h | 3 ++- > tools/perf/Documentation/perf-list.txt | 1 + > tools/perf/tests/parse-events.c | 18 ++++++++++++++++++ > tools/perf/util/evsel.c | 4 +++- > tools/perf/util/parse-events.c | 18 +++++++++++++----- > tools/perf/util/parse-events.l | 2 +- > 7 files changed, 40 insertions(+), 9 deletions(-) > > -- > 2.31.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
| |