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    SubjectRe: [RFC 0/7] Support in-kernel DMA with PASID and SVA
    On Wed, Sep 29, 2021 at 03:57:20PM -0700, Jacob Pan wrote:
    > Hi Jason,
    >
    > On Wed, 29 Sep 2021 16:39:53 -0300, Jason Gunthorpe <jgg@nvidia.com> wrote:
    >
    > > On Wed, Sep 29, 2021 at 12:37:19PM -0700, Jacob Pan wrote:
    > >
    > > > For #2, it seems we can store the kernel PASID in struct device. This
    > > > will preserve the DMA API interface while making it PASID capable.
    > > > Essentially, each PASID capable device would have two special global
    > > > PASIDs:
    > > > - PASID 0 for DMA request w/o PASID, aka RID2PASID
    > > > - PASID 1 (randomly selected) for in-kernel DMA request w/
    > > > PASID
    > >
    > > This seems reasonable, I had the same thought. Basically just have the
    > > driver issue some trivial call:
    > > pci_enable_pasid_dma(pdev, &pasid)
    > That would work, but I guess it needs to be an iommu_ call instead of pci_?

    Which ever makes sense.. The API should take in a struct pci_device
    and return a PCI PASID - at least as a wrapper around a more generic
    immu api.

    > I think your suggestion is more precise, in case the driver does not want
    > to do DMA w/ PASID, we can do less IOTLB flush (PASID 0 only).

    Since it is odd, and it may create overhead, I would do it only when
    asked to do it

    > > Having multiple RID's pointing at the same IO page table is something
    > > we expect iommufd to require so the whole thing should ideally fall
    > > out naturally.

    > That would be the equivalent of attaching multiple devices to the same
    > IOMMU domain. right?

    Effectively..

    Jason

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