Messages in this thread | | | From | Arnd Bergmann <> | Date | Sat, 25 Sep 2021 19:32:43 +0200 | Subject | Re: [PATCH 3/6] MIPS: ralink: set PCI_IOBASE to 'mips_io_port_base' |
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On Fri, Sep 24, 2021 at 11:11 PM Sergio Paracuellos <sergio.paracuellos@gmail.com> wrote: > > By default MIPS architecture use function 'set_io_port_base()' to set the > virtual address of the first IO port. This function at the end sets variable > 'mips_io_port_base' with the desired address. To align things and allow > to change first IO port location address for PCI, set PCI_IOBASE definition > as 'mips_io_port_base'. Also, we only need a size of 64 KB. > > Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> > --- > arch/mips/include/asm/mach-ralink/spaces.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/mips/include/asm/mach-ralink/spaces.h b/arch/mips/include/asm/mach-ralink/spaces.h > index 87d085c9ad61..05d14c21c417 100644 > --- a/arch/mips/include/asm/mach-ralink/spaces.h > +++ b/arch/mips/include/asm/mach-ralink/spaces.h > @@ -2,8 +2,8 @@ > #ifndef __ASM_MACH_RALINK_SPACES_H_ > #define __ASM_MACH_RALINK_SPACES_H_ > > -#define PCI_IOBASE _AC(0xa0000000, UL) > -#define PCI_IOSIZE SZ_16M > +#define PCI_IOBASE mips_io_port_base > +#define PCI_IOSIZE SZ_64K > #define IO_SPACE_LIMIT (PCI_IOSIZE - 1)
Acked-by: Arnd Bergmann <arnd@arndb.de>
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