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SubjectRe: [PATCH v12 05/35] dt-bindings: clock: tegra-car: Document new clock sub-nodes
On Mon, 20 Sep 2021 21:11:15 +0300, Dmitry Osipenko wrote:
> Document sub-nodes which describe Tegra SoC clocks that require a higher
> voltage of the core power domain in order to operate properly on a higher
> clock rates. Each node contains a phandle to OPP table and power domain.
>
> The root PLLs and system clocks don't have any specific device dedicated
> to them, clock controller is in charge of managing power for them.
>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
> .../bindings/clock/nvidia,tegra20-car.yaml | 37 +++++++++++++++++++
> 1 file changed, 37 insertions(+)
>

Reviewed-by: Rob Herring <robh@kernel.org>

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