Messages in this thread | | | Date | Thu, 23 Sep 2021 15:43:22 +0530 | From | rajpat@codeauro ... | Subject | Re: [PATCH V9 4/8] arm64: dts: sc7280: Add QUPv3 wrapper_0 nodes |
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On 2021-09-22 20:24, Doug Anderson wrote: > Hi, > > On Wed, Sep 22, 2021 at 5:31 AM <rajpat@codeaurora.org> wrote: >> >> >> + spi0: spi@980000 { >> >> + compatible = "qcom,geni-spi"; >> >> + reg = <0 0x00980000 0 0x4000>; >> >> + clocks = <&gcc >> >> GCC_QUPV3_WRAP0_S0_CLK>; >> >> + clock-names = "se"; >> >> + pinctrl-names = "default"; >> >> + pinctrl-0 = <&qup_spi0_data_clk>, >> >> <&qup_spi0_cs>, <&qup_spi0_cs_gpio>; >> > >> > This should only have qup_spi0_data_clk and qup_spi0_cs, not >> > qup_spi0_cs_gpio. Both qup controlled and gpio controlled options are >> > provided in case a board wants to use the qup version of chipselect, >> > but >> > having them both used by default leads to conflicts and confusion. This >> > same comment applies to all spi pinctrl properties in this file. Please >> > keep the cs_gpio variants though so that boards can use them if they >> > want. They will be unused, but that's OK. >> >> Okay. Shall we remove only "<&qup_spiN_cs_gpio>" in each SPI node? > > Right. So for this one: > > pinctrl-0 = <&qup_spi0_data_clk>, <&qup_spi0_cs>; > > -Doug
Okay.
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