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SubjectRe: [PATCH v7 1/4] dt-bindings: dmaengine: Add doc for tegra gpcdma
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On 23/09/2021 08:51, Akhil R wrote:
> Add DT binding document for Nvidia Tegra GPCDMA controller.
>
> Signed-off-by: Rajesh Gumasta <rgumasta@nvidia.com>
> Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
> ---
> .../bindings/dma/nvidia,tegra186-gpc-dma.yaml | 98 ++++++++++++++++++++++
> 1 file changed, 98 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml
>
> diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml
> new file mode 100644
> index 0000000..3dcf5a1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml
> @@ -0,0 +1,98 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/nvidia,tegra186-gpc-dma.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nvidia Tegra GPC DMA Controller Device Tree Bindings

If you ...

grep -r "title: NVIDIA" Documentation/devicetree/

You will find the titles all start "title: NVIDIA" and not Nvidia.
Always good to be consistent.

> +
> +description: |
> + The Tegra Genernal Purpose Central (GPC) DMA controller is used for faster

s/Genernal/General

> + data transfers between memory to memory, memory to device and device to
> + memory.
> +
> +maintainers:
> + - Jon Hunter <jonathanh@nvidia.com>
> + - Rajesh Gumasta <rgumasta@nvidia.com>
> +
> +allOf:
> + - $ref: "dma-controller.yaml#"
> +
> +properties:
> + "#dma-cells":
> + const: 1
> +
> + compatible:
> + - enum:
> + - nvidia,tegra186-gpcdma
> + - nvidia,tegra194-gpcdma
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + minItems: 1
> + maxItems: 32
> +
> + resets:
> + maxItems: 1
> +
> + reset-names:
> + const: gpcdma
> +
> + iommus:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - resets
> + - reset-names
> + - "#dma-cells"
> + - iommus
> +
> +examples:
> + - |
> + gpcdma: dma@2600000 {

The upstream convention is ...

gpcdma: dma-controller@2600000 {

> + compatible = "nvidia,tegra186-gpcdma";
> + reg = <0x0 0x2600000 0x0 0x210000>;
> + resets = <&bpmp TEGRA186_RESET_GPCDMA>;
> + reset-names = "gpcdma";
> + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> + #dma-cells = <1>;
> + iommus = <&smmu TEGRA_SID_GPCDMA_0>;
> + dma-coherent;
> + };
> +...
>

Please run ...

$ make dt_binding_check
CHKDT Documentation/devicetree/bindings/processed-schema-examples.json
./Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml:
while scanning for the next token
found character that cannot start any token
in "<unicode string>", line 34, column 1

For more details see ...
https://www.kernel.org/doc/Documentation/devicetree/writing-schema.rst

Jon

--
nvpublic

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