Messages in this thread | | | Subject | Re: [PATCH 1/3] drm/msm/dpu1: Add DMA2, DMA3 clock control to enum | From | Dmitry Baryshkov <> | Date | Fri, 3 Sep 2021 01:21:25 +0300 |
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On 01/09/2021 21:11, AngeloGioacchino Del Regno wrote: > The enum dpu_clk_ctrl_type misses DPU_CLK_CTRL_DMA{2,3} even though > this driver does actually handle both, if present: add the two in > preparation for adding support for SoCs having them. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> --- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h > index d2a945a27cfa..059e1402b7d0 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h > @@ -432,6 +432,8 @@ enum dpu_clk_ctrl_type { > DPU_CLK_CTRL_RGB3, > DPU_CLK_CTRL_DMA0, > DPU_CLK_CTRL_DMA1, > + DPU_CLK_CTRL_DMA2, > + DPU_CLK_CTRL_DMA3, > DPU_CLK_CTRL_CURSOR0, > DPU_CLK_CTRL_CURSOR1, > DPU_CLK_CTRL_INLINE_ROT0_SSPP, >
-- With best wishes Dmitry
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