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SubjectRE: [EXTERNAL] Re: [RFC 1/1] irqchip/gic-v3-its: Add irq domain and chip for Direct LPI without ITS
Date
On Monday, August 9, 2021 2:15 AM,
Marc Zyngier <maz@kernel.org> wrote:
[...]
> If you plug directly into the GICv3 layer, I'd rather you inject SPIs,
> just like any other non-architectural MSI controller. You can directly
> interface with the ACPI GSI layer for that, without any need to mess
> with the GICv3 internals. The SPI space isn't very large, but still
> much larger than the equivalent x86 space (close to 1000).
>
> If time is of the essence, I suggest you go the SPI way. For anything
> involving LPIs, I really want to see a firmware spec that works for
> everyone as opposed to a localised Hyper-V hack.
>
Ok, thanks. Before we commit to anything, I would like to make sure
that I am on the same page in terms of your description. With that in
mind, I have few questions. Hopefully, these should settle the matter.
1. If we go with the SPI route, then the way I envision it is that the
Hyper-V vPCI driver will implement an IRQ chip, which will take
care of allocating & managing the SPI interrupt for Hyper-V vPCI.
This IRQ chip will parent itself to the architectural GIC IRQ chip for
general interrupt management. Does that match with your
understanding/suggestion as well?

2. In the above, how will Hyper-V vPCI module discover the
architectural GIC IRQ domain generically for virtual devices that
are not firmware enumerated? Today, the GIC v3 IRQ domain is
not exported and the general 'irq_find_xyz' APIs only work for
firmware enumerated devices (i.e. something that has a fwnode
handle).

3. Longer term, if we implement LPIs (with an ITS or Direct LPI), to
be able to support all scenarios such as Live Migration, the
Hyper-V virtual PCI driver would like to be able to control the
MSI address & data that gets programmed on the device
(i.e. .irq_compose_msi_msg). We can use the architectural
methods for everything else. Does that fit into the realm of
what would be acceptable upstream?

Thanks,
Sunil

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