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SubjectRe: [PATCH] net: phy: micrel: Fix detection of ksz87xx switch
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> On 7 Aug 2021, at 10:01 am, Ben Hutchings <ben.hutchings@essensium.com> wrote:
>
> On Sat, Jul 31, 2021 at 08:19:17AM +1000, Steve Bennett wrote:
>>> On 31 Jul 2021, at 2:59 am, Jakub Kicinski <kuba@kernel.org> wrote:
>>>
>>> Please extend the CC list to the maintainers, and people who
>>> worked on this driver in the past, especially Marek.
>>
>> Sure, I can do that in a v2 of the patch along with the more detailed
>> explanation below.
>>
>>>
>>> On Fri, 30 Jul 2021 20:51:20 +1000 Steve Bennett wrote:
>>>> The previous logic was wrong such that the ksz87xx
>>>> switch was not identified correctly.
>>>
>>> Any more details of what is happening? Which extact device do you see
>>> this problem on?
>>
>> I have a ksz8795 switch.
>>
>> Without the patch:
>>
>> ksz8795-switch spi3.1 ade1 (uninitialized): PHY [dsa-0.1:03] driver [Generic PHY]
>> ksz8795-switch spi3.1 ade2 (uninitialized): PHY [dsa-0.1:04] driver [Generic PHY]
>>
>> With the patch:
>>
>> ksz8795-switch spi3.1 ade1 (uninitialized): PHY [dsa-0.1:03] driver [Micrel KSZ87XX Switch]
>> ksz8795-switch spi3.1 ade2 (uninitialized): PHY [dsa-0.1:04] driver [Micrel KSZ87XX Switch]
> [...]
>
> And do the external ports work for you after this?
>
> I have a development board with a KSZ8795. All ports worked before
> this patch. After this patch, when I bring up the external ports they
> are reported as having link up at 10M half duplex, when the link is
> actually down.
>
> The ksz8873mll_read_status() function is trying to read a non-standard
> MDIO register that is not handled by the ksz8795 driver's MDIO
> emulation (and is not documented as existing on the KSZ8873MLL,
> either!). It also also reports link up, which is obviously not
> correct for an external port.
>
> I'll post a patch as a reply to this.
>
> Ben.

Thanks Ben,

That looks reasonable to me. My board is running the external ports at 10HD so
I didn't pick this up, but your patch looks correct.

Cheers,
Steve
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