Messages in this thread | | | Date | Tue, 3 Aug 2021 10:35:38 +0530 | From | Viresh Kumar <> | Subject | Re: [PATCH v13 1/2] dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW |
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On 30-07-21, 00:08, Hector Yuan wrote: > From: "Hector.Yuan" <hector.yuan@mediatek.com> > > Add devicetree bindings for MediaTek HW driver. > > Signed-off-by: Hector.Yuan <hector.yuan@mediatek.com> > --- > .../bindings/cpufreq/cpufreq-mediatek-hw.yaml | 70 ++++++++++++++++++++ > 1 file changed, 70 insertions(+) > create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml > > diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml > new file mode 100644 > index 0000000..6bb2c97 > --- /dev/null > +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml > @@ -0,0 +1,70 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/cpufreq/cpufreq-mediatek-hw.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MediaTek's CPUFREQ Bindings > + > +maintainers: > + - Hector Yuan <hector.yuan@mediatek.com> > + > +description: > + CPUFREQ HW is a hardware engine used by MediaTek > + SoCs to manage frequency in hardware. It is capable of controlling frequency > + for multiple clusters. > +
Should this somewhere have a reference to Documentation/devicetree/bindings/dvfs/performance-domain.yaml ?
> +properties: > + compatible: > + const: mediatek,cpufreq-hw > + > + reg: > + minItems: 1 > + maxItems: 2 > + description: | > + Addresses and sizes for the memory of the > + HW bases in each frequency domain. > + > + "#performance-domain-cells": > + description: > + Number of cells in a performance domain specifier. Typically 1 for nodes > + providing multiple performance domains (e.g. performance controllers), > + but can be any value as specified by device tree binding documentation > + of particular provider.
You say this can have any value, 1 or more, but then ...
> + const: 1
You fix it to 1 ?
Perhaps you should add a reference to the performance-domain.yaml here as well, and say const 1 here and describe how the parameter is going to be used. You should only explain it in respect to your SoC.
But I am not that good with Yaml stuff, I will let Rob correct me here :)
-- viresh
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