Messages in this thread | | | From | Guenter Roeck <> | Subject | Re: [PATCH 2/2] clocksource/drivers/fttmr010: Be stricter on IRQs | Date | Fri, 27 Aug 2021 15:31:59 -0700 |
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On 8/27/21 3:01 PM, Linus Walleij wrote: > On Sat, Aug 21, 2021 at 6:20 AM Guenter Roeck <linux@roeck-us.net> wrote: >> On Sun, Jul 25, 2021 at 12:44:24AM +0200, Linus Walleij wrote: > >>> Make sure we check that the right interrupt occurred before >>> calling the event handler for timer 1. Report spurious IRQs >>> as IRQ_NONE. >>> >>> Cc: Cédric Le Goater <clg@kaod.org> >>> Cc: Joel Stanley <joel@jms.id.au> >>> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> >> >> This patch results in boot stalls with several qemu aspeed emulations >> (quanta-q71l-bmc, palmetto-bmc, witherspoon-bmc, ast2500-evb, >> romulus-bmc, g220a-bmc). Reverting this patch together with >> "clocksource/drivers/fttmr010: Clear also overflow bit on AST2600" >> fixes the problem. Bisect log is attached. > > Has it been tested on real hardware? > > We are reading register 0x34 TIMER_INTR_STATE for this. > So this should reflect the state of raw interrupts from the timers. > > I looked in qemu/hw/timer/aspeed_timer.c > and the aspeed_timer_read() looks dubious. > It rather looks like this falls down to returning whatever > was written to this register and not reflect which IRQ > was fired at all. >
Interesting question. There is aspeed_timer_read(), which doesn't return anything useful for register 0x34, and there is aspeed_{2400,2500,2600}_timer_read, which does. No idea what is actually executed.
Guenter
> Andrew: have you tested this when developing the > QEMU driver? > > Yours, > Linus Walleij >
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