| From | Chen-Yu Tsai <> | Date | Wed, 25 Aug 2021 18:55:26 +0800 | Subject | Re: [v2 18/24] clk: mediatek: Add MT8195 vdosys1 clock support |
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On Fri, Aug 20, 2021 at 7:31 PM Chun-Jie Chen <chun-jie.chen@mediatek.com> wrote: > > Add MT8195 vdosys1 clock controller which provides clock gate > control for video system. > > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> > --- > Integrate with mtk-mmsys driver which will pupulate device by > platform_device_register_data to start vdosys clock driver
Same thing about the commit message. The reason behind such a design should be documented and shared, so that other people looking at the code will have the same context.
ChenYu
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