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    Subject[PATCH 5.10 32/98] drm/amd/display: Fix Dynamic bpp issue with 8K30 with Navi 1X
    Date
    From: Bing Guo <bing.guo@amd.com>

    [ Upstream commit 06050a0f01dbac2ca33145ef19a72041206ea983 ]

    Why:
    In DCN2x, HW doesn't automatically divide MASTER_UPDATE_LOCK_DB_X
    by the number of pipes ODM Combined.

    How:
    Set MASTER_UPDATE_LOCK_DB_X to the value that is adjusted by the
    number of pipes ODM Combined.

    Reviewed-by: Martin Leung <martin.leung@amd.com>
    Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
    Signed-off-by: Bing Guo <bing.guo@amd.com>
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c
    index d8b18c515d06..e3cfb442a062 100644
    --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c
    +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c
    @@ -357,7 +357,7 @@ void optc2_lock_doublebuffer_enable(struct timing_generator *optc)

    REG_UPDATE_2(OTG_GLOBAL_CONTROL1,
    MASTER_UPDATE_LOCK_DB_X,
    - h_blank_start - 200 - 1,
    + (h_blank_start - 200 - 1) / optc1->opp_count,
    MASTER_UPDATE_LOCK_DB_Y,
    v_blank_start - 1);
    }
    --
    2.30.2
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