Messages in this thread Patch in this message | | | Subject | Re: [PATCH v3 31/41] powerpc/32: Dismantle EXC_XFER_STD/LITE/TEMPLATE | From | LEROY Christophe <> | Date | Mon, 2 Aug 2021 17:19:23 +0200 |
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Le 01/08/2021 à 03:21, Finn Thain a écrit : > On Sat, 31 Jul 2021, Christophe Leroy wrote: > >>> >>> Stan Johnson contacted me about a regression in mainline that he >>> observed on his G3 Powerbooks. Using 'git bisect' we determined that >>> this patch was the cause of the regression, i.e. commit 4c0104a83fc3 >>> ("powerpc/32: Dismantle EXC_XFER_STD/LITE/TEMPLATE"). >>> >>> When testing 4c0104a83fc and all subsequent builds, various user >>> processes were liable to segfault. Here is the console log that Stan >>> provided: >> >> Hi, i will be able to look at that more in details next week, however I >> have a few preliminary qurstions. >> >> Can you reliabily reproduce the problem with the said commit, and can >> you reliabily run without problem with the parent commit ? > > Yes and yes. (I already asked Stan to establish those things before I > contacted the list.)
I think I found the problem with that commit. Can you retry with the following change:
diff --git a/arch/powerpc/kernel/head_book3s_32.S b/arch/powerpc/kernel/head_book3s_32.S index 0a3d7d4a9ec4..a294103a91a1 100644 --- a/arch/powerpc/kernel/head_book3s_32.S +++ b/arch/powerpc/kernel/head_book3s_32.S @@ -299,7 +299,7 @@ ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_HPTE_TABLE) EXCEPTION_PROLOG_1 EXCEPTION_PROLOG_2 0x300 DataAccess handle_dar_dsisr=1 prepare_transfer_to_handler - lwz r5, _DSISR(r11) + lwz r5, _DSISR(r1) andis. r0, r5, DSISR_DABRMATCH@h bne- 1f bl do_page_fault --- Thanks Christophe
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