Messages in this thread | | | Subject | Re: [PATCH v1 3/3] arm64: dts: imx8mq: fix the schema check errors | From | Lucas Stach <> | Date | Thu, 19 Aug 2021 13:11:25 +0200 |
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Am Donnerstag, dem 19.08.2021 um 15:14 +0800 schrieb Richard Zhu: > The ranges should be aligned to $ref: /schemas/pci/pci-bus.yaml# > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Same comment as on the last patch, but still: Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
> --- > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > index 91df9c5350ae..45895dad85e1 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > @@ -1364,8 +1364,8 @@ pcie0: pcie@33800000 { > #size-cells = <2>; > device_type = "pci"; > bus-range = <0x00 0xff>; > - ranges = <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000 /* downstream I/O 64KB */ > - 0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */ > + ranges = <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000>, /* downstream I/O 64KB */ > + <0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */ > num-lanes = <1>; > num-viewport = <4>; > interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; > @@ -1402,8 +1402,8 @@ pcie1: pcie@33c00000 { > #address-cells = <3>; > #size-cells = <2>; > device_type = "pci"; > - ranges = <0x81000000 0 0x00000000 0x27f80000 0 0x00010000 /* downstream I/O 64KB */ > - 0x82000000 0 0x20000000 0x20000000 0 0x07f00000>; /* non-prefetchable memory */ > + ranges = <0x81000000 0 0x00000000 0x27f80000 0 0x00010000>, /* downstream I/O 64KB */ > + <0x82000000 0 0x20000000 0x20000000 0 0x07f00000>; /* non-prefetchable memory */ > num-lanes = <1>; > num-viewport = <4>; > interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
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