Messages in this thread | | | Subject | Re: [PATCH v2 0/5] Add Alder Lake PCH-S support to PMC core driver | From | "Limonciello, Mario" <> | Date | Fri, 9 Jul 2021 13:30:58 -0500 |
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On 7/9/2021 12:40, Kammela, Gayatri wrote: >> -----Original Message----- >> From: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com> >> Sent: Thursday, July 8, 2021 10:33 AM >> To: Kammela, Gayatri <gayatri.kammela@intel.com> >> Cc: platform-driver-x86@vger.kernel.org; mgross@linux.intel.com; >> hdegoede@redhat.com; Andy Shevchenko >> <andriy.shevchenko@linux.intel.com>; vicamo.yang@canonical.com; >> Pandruvada, Srinivas <srinivas.pandruvada@intel.com>; Box, David E >> <david.e.box@intel.com>; linux-kernel@vger.kernel.org; Mashiah, Tamar >> <tamar.mashiah@intel.com>; gregkh@linuxfoundation.org; >> rajatja@google.com; Shyam-sundar.S-k@amd.com; >> Alexander.Deucher@amd.com; mlimonci@amd.com >> Subject: Re: [PATCH v2 0/5] Add Alder Lake PCH-S support to PMC core driver >> >> Series looks good to me. >> >> Acked-by: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com> > Thanks Rajneesh! >> >> + AMD folks >> >> Hi Alex, Mario and Shaym - Perhaps AMD PMC files should also follow the >> similar convention and it could probably evolve in future where both x86 >> based PMC drivers might use some common library helper functions. What >> do you think?
Gayatri,
If there is going to be PMC subfolder, then yes of course amd-pmc.c should move into it too.
Are you also thinking to move uPEP code from drivers/acpi/x86/s2idle.c into the PMC drivers? Or do you have some suggestions on what code could be shared between AMD and Intel PMC drivers?
Thanks,
>> >> >> On Wed, Jul 7, 2021 at 10:10 PM Gayatri Kammela >> <gayatri.kammela@intel.com> wrote: >>> >>> Hi, >>> The patch series move intel_pmc_core* files to pmc subfolder as well >>> as add Alder Lake PCH-S support to PMC core driver. >>> >>> Patch 1: Move intel_pmc_core* files to pmc subfolder Patch 2: Add >>> Alderlake support to pmc_core driver Patch 3: Add Latency Tolerance >>> Reporting (LTR) support to Alder Lake Patch 4: Add Alder Lake low >>> power mode support for pmc_core Patch 5: Add GBE Package C10 fix for >>> Alder Lake >>> >>> Changes since v1: >>> 1) Add patch 1 to v2 i.e., Move intel_pmc_core* files to pmc subfolder >>> 2) Modify commit message for patch 2. >>> >>> David E. Box (1): >>> platform/x86: intel_pmc_core: Add GBE Package C10 fix for Alder Lake >>> PCH >>> >>> Gayatri Kammela (4): >>> platform/x86: intel_pmc_core: Move intel_pmc_core* files to pmc >>> subfolder >>> platform/x86/intel: intel_pmc_core: Add Alderlake support to pmc_core >>> driver >>> platform/x86/intel: intel_pmc_core: Add Latency Tolerance Reporting >>> (LTR) support to Alder Lake >>> platform/x86/intel: intel_pmc_core: Add Alder Lake low power mode >>> support for pmc_core >>> >>> drivers/platform/x86/Kconfig | 21 -- >>> drivers/platform/x86/Makefile | 1 - >>> drivers/platform/x86/intel/Kconfig | 1 + >>> drivers/platform/x86/intel/Makefile | 1 + >>> drivers/platform/x86/intel/pmc/Kconfig | 22 ++ >>> drivers/platform/x86/intel/pmc/Makefile | 5 + >>> .../x86/{ => intel/pmc}/intel_pmc_core.c | 307 +++++++++++++++++- >>> .../x86/{ => intel/pmc}/intel_pmc_core.h | 17 + >>> .../{ => intel/pmc}/intel_pmc_core_pltdrv.c | 0 >>> 9 files changed, 350 insertions(+), 25 deletions(-) create mode >>> 100644 drivers/platform/x86/intel/pmc/Kconfig >>> create mode 100644 drivers/platform/x86/intel/pmc/Makefile >>> rename drivers/platform/x86/{ => intel/pmc}/intel_pmc_core.c (85%) >>> rename drivers/platform/x86/{ => intel/pmc}/intel_pmc_core.h (95%) >>> rename drivers/platform/x86/{ => intel/pmc}/intel_pmc_core_pltdrv.c >>> (100%) >>> >>> Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com> >>> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> >>> Cc: David Box <david.e.box@intel.com> >>> Cc: You-Sheng Yang <vicamo.yang@canonical.com> >>> Cc: Hans de Goede <hdegoede@redhat.com> >>> >>> base-commit: a931dd33d370896a683236bba67c0d6f3d01144d >>> -- >>> 2.25.1 >>> >> >> >> -- >> Thanks, >> Rajneesh
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