Messages in this thread Patch in this message | | | From | Jon Lin <> | Subject | [RFC PATCH v11 10/10] arm64: dts: rockchip: Enable SFC for Odroid Go Advance | Date | Wed, 7 Jul 2021 17:09:25 +0800 |
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From: Chris Morgan <macromorgan@hotmail.com>
This enables the Rockchip Serial Flash Controller for the Odroid Go Advance. Note that while the attached SPI NOR flash and the controller both support quad read mode, only 2 of the required 4 pins are present. The rx bus width is set to 2 for this reason, and tx bus width is set to 1 for compatibility reasons.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> ---
Changes in v11: - The tx is set to 1 for Odroid Go Advance device
Changes in v10: None Changes in v9: None Changes in v8: None Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None Changes in v1: None
.../boot/dts/rockchip/rk3326-odroid-go2.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts index 49c97f76df77..4410a6ef5ada 100644 --- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts @@ -484,6 +484,22 @@ status = "okay"; }; +&sfc { + pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus2>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <108000000>; + spi-rx-bus-width = <2>; + spi-tx-bus-width = <1>; + }; +}; + &tsadc { status = "okay"; }; -- 2.17.1
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