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    Subject[PATCH AUTOSEL 5.10 040/137] drm: rockchip: add missing registers for RK3066
    Date
    From: Alex Bee <knaerzche@gmail.com>

    [ Upstream commit 742203cd56d150eb7884eb45abb7d9dbc2bdbf04 ]

    Add dither_up, dsp_lut_en and data_blank registers to enable their
    respective functionality for RK3066's VOP.

    While at that also fix .rb_swap and .format registers for all windows,
    which have to be set though RK3066_SYS_CTRL1 register.
    Also remove .scl from win1: Scaling is only supported on the primary
    plane.

    Signed-off-by: Alex Bee <knaerzche@gmail.com>
    Signed-off-by: Heiko Stuebner <heiko@sntech.de>
    Link: https://patchwork.freedesktop.org/patch/msgid/20210528130554.72191-4-knaerzche@gmail.com
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 16 +++++++++-------
    1 file changed, 9 insertions(+), 7 deletions(-)

    diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
    index b8dcee64a1f7..a6fe03c3748a 100644
    --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
    +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
    @@ -349,8 +349,8 @@ static const struct vop_win_phy rk3066_win0_data = {
    .nformats = ARRAY_SIZE(formats_win_full),
    .format_modifiers = format_modifiers_win_full,
    .enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 0),
    - .format = VOP_REG(RK3066_SYS_CTRL0, 0x7, 4),
    - .rb_swap = VOP_REG(RK3066_SYS_CTRL0, 0x1, 19),
    + .format = VOP_REG(RK3066_SYS_CTRL1, 0x7, 4),
    + .rb_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 19),
    .act_info = VOP_REG(RK3066_WIN0_ACT_INFO, 0x1fff1fff, 0),
    .dsp_info = VOP_REG(RK3066_WIN0_DSP_INFO, 0x0fff0fff, 0),
    .dsp_st = VOP_REG(RK3066_WIN0_DSP_ST, 0x1fff1fff, 0),
    @@ -361,13 +361,12 @@ static const struct vop_win_phy rk3066_win0_data = {
    };

    static const struct vop_win_phy rk3066_win1_data = {
    - .scl = &rk3066_win_scl,
    .data_formats = formats_win_full,
    .nformats = ARRAY_SIZE(formats_win_full),
    .format_modifiers = format_modifiers_win_full,
    .enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 1),
    - .format = VOP_REG(RK3066_SYS_CTRL0, 0x7, 7),
    - .rb_swap = VOP_REG(RK3066_SYS_CTRL0, 0x1, 23),
    + .format = VOP_REG(RK3066_SYS_CTRL1, 0x7, 7),
    + .rb_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 23),
    .act_info = VOP_REG(RK3066_WIN1_ACT_INFO, 0x1fff1fff, 0),
    .dsp_info = VOP_REG(RK3066_WIN1_DSP_INFO, 0x0fff0fff, 0),
    .dsp_st = VOP_REG(RK3066_WIN1_DSP_ST, 0x1fff1fff, 0),
    @@ -382,8 +381,8 @@ static const struct vop_win_phy rk3066_win2_data = {
    .nformats = ARRAY_SIZE(formats_win_lite),
    .format_modifiers = format_modifiers_win_lite,
    .enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 2),
    - .format = VOP_REG(RK3066_SYS_CTRL0, 0x7, 10),
    - .rb_swap = VOP_REG(RK3066_SYS_CTRL0, 0x1, 27),
    + .format = VOP_REG(RK3066_SYS_CTRL1, 0x7, 10),
    + .rb_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 27),
    .dsp_info = VOP_REG(RK3066_WIN2_DSP_INFO, 0x0fff0fff, 0),
    .dsp_st = VOP_REG(RK3066_WIN2_DSP_ST, 0x1fff1fff, 0),
    .yrgb_mst = VOP_REG(RK3066_WIN2_MST, 0xffffffff, 0),
    @@ -408,6 +407,9 @@ static const struct vop_common rk3066_common = {
    .dither_down_en = VOP_REG(RK3066_DSP_CTRL0, 0x1, 11),
    .dither_down_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 10),
    .dsp_blank = VOP_REG(RK3066_DSP_CTRL1, 0x1, 24),
    + .dither_up = VOP_REG(RK3066_DSP_CTRL0, 0x1, 9),
    + .dsp_lut_en = VOP_REG(RK3066_SYS_CTRL1, 0x1, 31),
    + .data_blank = VOP_REG(RK3066_DSP_CTRL1, 0x1, 25),
    };

    static const struct vop_win_data rk3066_vop_win_data[] = {
    --
    2.30.2
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