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Subject[tip: perf/core] perf/x86/intel/uncore: Add Sapphire Rapids server M2PCIe support
The following commit has been merged into the perf/core branch of tip:

Commit-ID: f85ef898f8842b2a9a8f51a64eaf45ee2a8bb1f7
Gitweb: https://git.kernel.org/tip/f85ef898f8842b2a9a8f51a64eaf45ee2a8bb1f7
Author: Kan Liang <kan.liang@linux.intel.com>
AuthorDate: Wed, 30 Jun 2021 14:08:29 -07:00
Committer: Peter Zijlstra <peterz@infradead.org>
CommitterDate: Fri, 02 Jul 2021 15:58:38 +02:00

perf/x86/intel/uncore: Add Sapphire Rapids server M2PCIe support

M2PCIe* blocks manage the interface between the mesh and each IIO stack.

The layout of the control registers for a M2PCIe uncore unit is similar
to a IRP uncore unit.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Link: https://lore.kernel.org/r/1625087320-194204-6-git-send-email-kan.liang@linux.intel.com
---
arch/x86/events/intel/uncore_snbep.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index de5a6d1..890a982 100644
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -5628,13 +5628,18 @@ static struct intel_uncore_type spr_uncore_irp = {

};

+static struct intel_uncore_type spr_uncore_m2pcie = {
+ SPR_UNCORE_COMMON_FORMAT(),
+ .name = "m2pcie",
+};
+
#define UNCORE_SPR_NUM_UNCORE_TYPES 12

static struct intel_uncore_type *spr_uncores[UNCORE_SPR_NUM_UNCORE_TYPES] = {
&spr_uncore_chabox,
&spr_uncore_iio,
&spr_uncore_irp,
- NULL,
+ &spr_uncore_m2pcie,
NULL,
NULL,
NULL,
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