Messages in this thread | | | Subject | Re: [PATCH v3 2/7] x86/sgx: Add infrastructure to identify SGX EPC pages | From | Dave Hansen <> | Date | Fri, 30 Jul 2021 13:35:42 -0700 |
| |
On 7/30/21 11:44 AM, Luck, Tony wrote: > @@ -649,6 +650,9 @@ static bool __init sgx_setup_epc_section(u64 phys_addr, u64 size, > } > > section->phys_addr = phys_addr; > + section->end_phys_addr = phys_addr + size - 1; > + xa_store_range(&epc_page_ranges, section->phys_addr, > + section->end_phys_addr, section, GFP_KERNEL);
That is compact, but how much memory does it eat? I'm a little worried about this hunk of xa_store_range():
> do { > xas_set_range(&xas, first, last); > xas_store(&xas, entry); > if (xas_error(&xas)) > goto unlock; > first += xas_size(&xas); > } while (first <= last);
That makes it look like it's iterating over the whole range and making loads of individual array instead of doing something super clever like keeping an extent-style structure.
Let's say we have 1TB of EPC. How big is the array to store these indexes? Would this be more compact if instead of doing a physical address range:
xa_store_range(&epc_page_ranges, section->phys_addr, section->end_phys_addr, ...);
... you did it based on PFNs:
xa_store_range(&epc_page_ranges, section->phys_addr >> PAGE_SHIFT, section->end_phys_addr >> PAGE_SHIFT, ...);
SGX sections are at *least* page-aligned, so this should be fine.
| |