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Subject[PATCH 08/11] perf test: Add more pmu-events uncore aliases
Date
Add more events to cover the scenarios fixed and also inadvertently broken
by commit c47a5599eda3 ("perf tools: Fix pattern matching for same
substring in different PMU type").

Signed-off-by: John Garry <john.garry@huawei.com>
---
.../arch/test/test_soc/cpu/uncore.json | 23 +++++-
tools/perf/tests/pmu-events.c | 72 +++++++++++++++++++
2 files changed, 94 insertions(+), 1 deletion(-)

diff --git a/tools/perf/pmu-events/arch/test/test_soc/cpu/uncore.json b/tools/perf/pmu-events/arch/test/test_soc/cpu/uncore.json
index d0a890cc814d..788766f45dbc 100644
--- a/tools/perf/pmu-events/arch/test/test_soc/cpu/uncore.json
+++ b/tools/perf/pmu-events/arch/test/test_soc/cpu/uncore.json
@@ -17,5 +17,26 @@
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
- }
+ },
+ {
+ "EventCode": "0x7",
+ "EventName": "uncore_hisi_l3c.rd_hit_cpipe",
+ "BriefDescription": "Total read hits",
+ "PublicDescription": "Total read hits",
+ "Unit": "hisi_sccl,l3c"
+ },
+ {
+ "EventCode": "0x12",
+ "EventName": "uncore_imc_free_running.cache_miss",
+ "BriefDescription": "Total cache misses",
+ "PublicDescription": "Total cache misses",
+ "Unit": "imc_free_running"
+ },
+ {
+ "EventCode": "0x34",
+ "EventName": "uncore_imc.cache_hits",
+ "BriefDescription": "Total cache hits",
+ "PublicDescription": "Total cache hits",
+ "Unit": "imc"
+ },
]
diff --git a/tools/perf/tests/pmu-events.c b/tools/perf/tests/pmu-events.c
index 74c7dfe0a97f..0fcdeeda00ec 100644
--- a/tools/perf/tests/pmu-events.c
+++ b/tools/perf/tests/pmu-events.c
@@ -143,9 +143,54 @@ static const struct perf_pmu_test_event unc_cbo_xsnp_response_miss_eviction = {
.matching_pmu = "uncore_cbox_0",
};

+static const struct perf_pmu_test_event uncore_hisi_l3c_rd_hit_cpipe = {
+ .event = {
+ .name = "uncore_hisi_l3c.rd_hit_cpipe",
+ .event = "event=0x2",
+ .desc = "Total read hits. Unit: hisi_sccl,l3c ",
+ .topic = "uncore",
+ .long_desc = "Total read hits",
+ .pmu = "hisi_sccl,l3c",
+ },
+ .alias_str = "event=0x7",
+ .alias_long_desc = "Total read hits",
+ .matching_pmu = "hisi_sccl3_l3c7",
+};
+
+static const struct perf_pmu_test_event uncore_imc_free_running_cache_miss = {
+ .event = {
+ .name = "uncore_imc_free_running.cache_miss",
+ .event = "event=0x12",
+ .desc = "Total cache misses. Unit: uncore_imc_free_running ",
+ .topic = "uncore",
+ .long_desc = "Total cache misses",
+ .pmu = "uncore_imc_free_running",
+ },
+ .alias_str = "event=0x12",
+ .alias_long_desc = "Total cache misses",
+ .matching_pmu = "uncore_imc_free_running_0",
+};
+
+static const struct perf_pmu_test_event uncore_imc_cache_hits = {
+ .event = {
+ .name = "uncore_imc.cache_hits",
+ .event = "event=0x34",
+ .desc = "Total cache hits. Unit: uncore_imc ",
+ .topic = "uncore",
+ .long_desc = "Total cache hits",
+ .pmu = "uncore_imc",
+ },
+ .alias_str = "event=0x34",
+ .alias_long_desc = "Total cache hits",
+ .matching_pmu = "uncore_imc_0",
+};
+
static const struct perf_pmu_test_event *uncore_events[] = {
&uncore_hisi_ddrc_flux_wcmd,
&unc_cbo_xsnp_response_miss_eviction,
+ &uncore_hisi_l3c_rd_hit_cpipe,
+ &uncore_imc_free_running_cache_miss,
+ &uncore_imc_cache_hits,
NULL
};

@@ -504,6 +549,33 @@ static struct perf_pmu_test_pmu test_pmus[] = {
&unc_cbo_xsnp_response_miss_eviction,
},
},
+ {
+ .pmu = {
+ .name = (char *)"hisi_sccl3_l3c7",
+ .is_uncore = 1,
+ },
+ .aliases = {
+ &uncore_hisi_l3c_rd_hit_cpipe,
+ },
+ },
+ {
+ .pmu = {
+ .name = (char *)"uncore_imc_free_running_0",
+ .is_uncore = 1,
+ },
+ .aliases = {
+ &uncore_imc_free_running_cache_miss,
+ },
+ },
+ {
+ .pmu = {
+ .name = (char *)"uncore_imc_0",
+ .is_uncore = 1,
+ },
+ .aliases = {
+ &uncore_imc_cache_hits,
+ },
+ },
};

/* Test that aliases generated are as expected */
--
2.26.2
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