Messages in this thread | | | From | Hsin-Yi Wang <> | Date | Thu, 29 Jul 2021 13:47:03 +0800 | Subject | Re: [PATCH] soc: mmsys: mediatek: add mask to mmsys routes |
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On Thu, Jul 29, 2021 at 1:40 PM Frank Wunderlich <linux@fw-web.de> wrote: > > Am 29. Juli 2021 05:15:23 MESZ schrieb Hsin-Yi Wang <hsinyi@chromium.org>: > > >This patch is breaking the mt8183 internal display. I think it's > >because ~routes[i].val; is removed? > >Also what should the routes[i].mask be if it's not set in > >mmsys_mt8183_routing_table? > > > >> writel_relaxed(reg, mmsys->regs + > >routes[i].addr); > >> } > >> } > ><snip> > > The mask should reset the needed bits,maybe it needs to be adjusted for your ddp components... > > Can you add some debugs inside loops in mtk_mmsys_ddp_connect and mtk_mmsys_ddp_disconnect (show read val,mask and final mask before write) to show differences before and after the patch? > struct mtk_mmsys_routes { u32 from_comp; u32 to_comp; u32 addr; + u32 mask; u32 val; }; mask is not the last element, and mmsys_mt8183_routing_table = { { DDP_COMPONENT_OVL0, DDP_COMPONENT_OVL_2L0, MT8183_DISP_OVL0_MOUT_EN, MT8183_OVL0_MOUT_EN_OVL0_2L } ... so the mask and val will be wrong. CK, do you know what mask we should set for mt8183? Or can we just set a dummy 0 mask.
> regards Frank
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