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SubjectRe: [v6 2/2] arm64: dts: mediatek: Correct UART0 bus clock of MT8192
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On Wed, 2021-07-28 at 14:14 +0800, Ikjoon Jang wrote:
> Hi,
>
> On Tue, Jul 27, 2021 at 10:43 AM Chun-Jie Chen
> <chun-jie.chen@mediatek.com> wrote:
> >
> > infra_uart0 clock is the real one what uart0 uses as bus clock.
> >
> > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
> > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
> > ---
> > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> > b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> > index c7c7d4e017ae..9810f1d441da 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> > @@ -327,7 +327,7 @@
> > "mediatek,mt6577-uart";
> > reg = <0 0x11002000 0 0x1000>;
> > interrupts = <GIC_SPI 109
> > IRQ_TYPE_LEVEL_HIGH 0>;
> > - clocks = <&clk26m>, <&clk26m>;
> > + clocks = <&clk26m>, <&infracfg
> > CLK_INFRA_UART0>;
> > clock-names = "baud", "bus";
> > status = "disabled";
> > };
>
> There're many other nodes still having only clk26m. Will you update
> them too?
>

Others will be updated by IP owner.

Best Regards,
Chun-Jie

> > --
> > 2.18.0
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> >
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> >
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