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    Subject[PATCH 4.14 49/82] liquidio: Fix unintentional sign extension issue on left shift of u16
    Date
    From: Colin Ian King <colin.king@canonical.com>

    [ Upstream commit e7efc2ce3d0789cd7c21b70ff00cd7838d382639 ]

    Shifting the u16 integer oct->pcie_port by CN23XX_PKT_INPUT_CTL_MAC_NUM_POS
    (29) bits will be promoted to a 32 bit signed int and then sign-extended
    to a u64. In the cases where oct->pcie_port where bit 2 is set (e.g. 3..7)
    the shifted value will be sign extended and the top 32 bits of the result
    will be set.

    Fix this by casting the u16 values to a u64 before the 29 bit left shift.

    Addresses-Coverity: ("Unintended sign extension")

    Fixes: 3451b97cce2d ("liquidio: CN23XX register setup")
    Signed-off-by: Colin Ian King <colin.king@canonical.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c b/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c
    index 30f0e54f658e..4248ba307b66 100644
    --- a/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c
    +++ b/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c
    @@ -420,7 +420,7 @@ static int cn23xx_pf_setup_global_input_regs(struct octeon_device *oct)
    * bits 32:47 indicate the PVF num.
    */
    for (q_no = 0; q_no < ern; q_no++) {
    - reg_val = oct->pcie_port << CN23XX_PKT_INPUT_CTL_MAC_NUM_POS;
    + reg_val = (u64)oct->pcie_port << CN23XX_PKT_INPUT_CTL_MAC_NUM_POS;

    /* for VF assigned queues. */
    if (q_no < oct->sriov_info.pf_srn) {
    --
    2.30.2


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