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Subject[linux-chenxing:mstar_v5_14_rebase 174/352] arch/arm/mach-mstar/suspend-msc313.S:149: Error: selected processor does not support `movw r7,#(1<<(4))' in ARM mode
tree:   git://github.com/linux-chenxing/linux.git mstar_v5_14_rebase
head: 651efd0e52f225e60faa8b30f9768021e2104d3c
commit: c1569e4f0b838c4a36a86a3ba7695da03b107ba2 [174/352] ARM: mstar: PM
config: arm-allyesconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 10.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/linux-chenxing/linux/commit/c1569e4f0b838c4a36a86a3ba7695da03b107ba2
git remote add linux-chenxing git://github.com/linux-chenxing/linux.git
git fetch --no-tags linux-chenxing mstar_v5_14_rebase
git checkout c1569e4f0b838c4a36a86a3ba7695da03b107ba2
# save the attached .config to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-10.3.0 make.cross O=build_dir ARCH=arm SHELL=/bin/bash

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All error/warnings (new ones prefixed by >>):

>> arch/arm/mach-mstar/pm.c:83:12: warning: no previous prototype for 'msc313_pm_init' [-Wmissing-prototypes]
83 | int __init msc313_pm_init(void)
| ^~~~~~~~~~~~~~
arch/arm/mach-mstar/pm.c: In function 'msc313_pm_init':
arch/arm/mach-mstar/pm.c:152:1: warning: label 'put_node' defined but not used [-Wunused-label]
152 | put_node:
| ^~~~~~~~
arch/arm/mach-mstar/pm.c:89:16: warning: unused variable 'imi_base' [-Wunused-variable]
89 | void __iomem *imi_base;
| ^~~~~~~~
arch/arm/mach-mstar/pm.c:88:19: warning: unused variable 'imi_pool' [-Wunused-variable]
88 | struct gen_pool *imi_pool;
| ^~~~~~~~
arch/arm/mach-mstar/pm.c:87:26: warning: unused variable 'pdev' [-Wunused-variable]
87 | struct platform_device *pdev;
| ^~~~
--
arch/arm/mach-mstar/suspend-msc313.S: Assembler messages:
>> arch/arm/mach-mstar/suspend-msc313.S:149: Error: selected processor does not support `movw r7,#(1<<(4))' in ARM mode
>> arch/arm/mach-mstar/suspend-msc313.S:153: Error: selected processor does not support `movw r7,#(1<<(11))|(1<<(10))|(1<<(9))|(1<<(8))|(1<<(0))' in ARM mode
>> arch/arm/mach-mstar/suspend-msc313.S:164: Error: selected processor does not support `movw r7,#(1<<(10))|(1<<(8))' in ARM mode
arch/arm/mach-mstar/suspend-msc313.S:172: Error: selected processor does not support `movw r7,#(1<<(9))|(1<<(8))' in ARM mode


vim +149 arch/arm/mach-mstar/suspend-msc313.S

123
124 //This must run in SRAM
125 ENTRY(msc313_suspend_imi)
126 // setup r1 to point to the pm_uart
127 ldr r1, [r0, PMINFO_BANK_UART]
128
129 // First block all access except one in group 0, cpu?
130 // miu-2
131 setbank PMINFO_BANK_MIU_DIG
132 setword_defuq MIU_DIG_GROUP0_REQ_MASK, 0xfffe
133 setword_defuq MIU_DIG_GROUP1_REQ_MASK, 0xffff
134 setword_defuq MIU_DIG_GROUP2_REQ_MASK, 0xffff
135 setword_defuq MIU_DIG_GROUP3_REQ_MASK, 0xffff
136 // miu-1
137 setbank PMINFO_BANK_MIU_DIG1
138 setword 0x06, 0xffff
139 setword 0x26, 0xffff
140 // wait for everything to finish
141 delay
142
143 // miu-2
144 setbank PMINFO_BANK_MIU_DIG
145 // single command mode register
146 setword_defuq MIU_DIG_MRX, 0x0400
147 // turn off auto refresh and ODT
148 setbits MIU_DIG_CNTRL0, MIU_DIG_CNTRL0_REFRESH_OFF
> 149 clearbits MIU_DIG_CNTRL0, MIU_DIG_CNTRL0_ODT
150
151 // trigger all banks precharge to put the ddr2 back into idle
152 // clear command and auto init
> 153 clearbits MIU_DIG_CNTRL0, MIU_DIG_CNTRL0_CMD_RAS | \
154 MIU_DIG_CNTRL0_CMD_CAS | \
155 MIU_DIG_CNTRL0_CMD_WE | \
156 MIU_DIG_CNTRL0_CMD_ISSUE | \
157 MIU_DIG_CNTRL0_INIT_MIU
158 // cas high trigger command
159 setbits MIU_DIG_CNTRL0, MIU_DIG_CNTRL0_CMD_CAS | \
160 MIU_DIG_CNTRL0_CMD_ISSUE
161 // wait for command to complete
162 pollbit MIU_DIG_CNTRL0, MIU_DIG_CNTRL0_CMD_DONE
163 // clear command issue and casz
> 164 clearbits MIU_DIG_CNTRL0, MIU_DIG_CNTRL0_CMD_CAS | \
165 MIU_DIG_CNTRL0_CMD_ISSUE
166 // we# high
167 setbits MIU_DIG_CNTRL0, MIU_DIG_CNTRL0_CMD_WE | \
168 MIU_DIG_CNTRL0_CMD_ISSUE
169 // wait for command to complete
170 pollbit MIU_DIG_CNTRL0, MIU_DIG_CNTRL0_CMD_DONE
171 // clear command issue and we
172 clearbits MIU_DIG_CNTRL0, MIU_DIG_CNTRL0_CMD_WE | \
173 MIU_DIG_CNTRL0_CMD_ISSUE
174 // mask all requests
175 setword_defuq MIU_DIG_GROUP0_REQ_MASK, 0xffff
176 // set self refresh
177 setbits MIU_DIG_CNTRL0, MIU_DIG_CNTRL0_SELF_REFRESH
178
179 // Now that the DDR is doing it's own thing disable
180 // power everything down to save energy
181
182 // miu-2
183 setbank 0x10
184 setbits 0x04, 0xf000 // mclk delay etc
185 // miu-0
186 setbank PMINFO_BANK_MIU_ANA
187 setbits 0x00, 0x0018 // set gpio mode, output highz
188 setword 0x54, 0xc070 // unknown
189 setword 0x08, 0x0000 // clear rx en
190
191 // not sure what this does. causes the cpu to lock up though
192 //wriu 0x3c24 0x30 //reg_pwoff_rst0_en, reg_pwoff_rst1_en
193 //ldr r4, =0x1f007800
194 //setbyte 0x24 0x30
195
196 // Unlock the power down stuff
197 setbank 0x0
198 setbyte 0x38, 0x0c
199 setword 0x24, 0xbabe
200 setbyte 0x6e, 0xa5 //commented out in new sdk
201
202 // Finally set pm_gpio4 to turn the lights off
203 setbank 0x4
204 setbyte 0x08, 0x10
205
206 putch '!'
207 newline
208

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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