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    Subject[PATCH 5.13 204/351] pwm: visconti: Fix and simplify period calculation
    Date
    From: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

    [ Upstream commit 937efa29e70f7f8424b74631375dcb35d82a4614 ]

    With the original code a request for period = 65536000 ns and period =
    32768000 ns yields the same register settings (which results in 32768000
    ns) because the value for pwmc0 was miscalculated.

    Also simplify using that fls(0) is 0.

    Fixes: 721b595744f1 ("pwm: visconti: Add Toshiba Visconti SoC PWM support")
    Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
    Acked-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
    Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/pwm/pwm-visconti.c | 17 +++++++----------
    1 file changed, 7 insertions(+), 10 deletions(-)

    diff --git a/drivers/pwm/pwm-visconti.c b/drivers/pwm/pwm-visconti.c
    index 46d903786366..af4e37d3e3a6 100644
    --- a/drivers/pwm/pwm-visconti.c
    +++ b/drivers/pwm/pwm-visconti.c
    @@ -82,17 +82,14 @@ static int visconti_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
    return -ERANGE;

    /*
    - * PWMC controls a divider that divides the input clk by a
    - * power of two between 1 and 8. As a smaller divider yields
    - * higher precision, pick the smallest possible one.
    + * PWMC controls a divider that divides the input clk by a power of two
    + * between 1 and 8. As a smaller divider yields higher precision, pick
    + * the smallest possible one. As period is at most 0xffff << 3, pwmc0 is
    + * in the intended range [0..3].
    */
    - if (period > 0xffff) {
    - pwmc0 = ilog2(period >> 16);
    - if (WARN_ON(pwmc0 > 3))
    - return -EINVAL;
    - } else {
    - pwmc0 = 0;
    - }
    + pwmc0 = fls(period >> 16);
    + if (WARN_ON(pwmc0 > 3))
    + return -EINVAL;

    period >>= pwmc0;
    duty_cycle >>= pwmc0;
    --
    2.30.2


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