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    Subject[PATCH 5.13 240/351] PCI: tegra194: Fix tegra_pcie_ep_raise_msi_irq() ill-defined shift
    Date
    From: Jon Hunter <jonathanh@nvidia.com>

    [ Upstream commit f67092eff2bd40650aad54a1a1910160f41d864a ]

    tegra_pcie_ep_raise_msi_irq() shifted a signed 32-bit value left by 31
    bits. The behavior of this is implementation-defined.

    Replace the shift by BIT(), which is well-defined.

    Found by cppcheck:

    $ cppcheck --enable=all drivers/pci/controller/dwc/pcie-tegra194.c
    Checking drivers/pci/controller/dwc/pcie-tegra194.c ...

    drivers/pci/controller/dwc/pcie-tegra194.c:1829:23: portability: Shifting signed 32-bit value by 31 bits is implementation-defined behaviour. See condition at line 1826. [shiftTooManyBitsSigned]

    appl_writel(pcie, (1 << irq), APPL_MSI_CTRL_1);
    ^

    [bhelgaas: commit log]
    Link: https://lore.kernel.org/r/20210618160219.303092-1-jonathanh@nvidia.com
    Fixes: c57247f940e8 ("PCI: tegra: Add support for PCIe endpoint mode in Tegra194")
    Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
    Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
    Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/pci/controller/dwc/pcie-tegra194.c | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
    index fa6b12cfc043..3ec7b29d5dc7 100644
    --- a/drivers/pci/controller/dwc/pcie-tegra194.c
    +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
    @@ -1826,7 +1826,7 @@ static int tegra_pcie_ep_raise_msi_irq(struct tegra_pcie_dw *pcie, u16 irq)
    if (unlikely(irq > 31))
    return -EINVAL;

    - appl_writel(pcie, (1 << irq), APPL_MSI_CTRL_1);
    + appl_writel(pcie, BIT(irq), APPL_MSI_CTRL_1);

    return 0;
    }
    --
    2.30.2


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