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    Subject[PATCH 4.19 414/421] ARM: dts: imx6q-dhcom: Add gpios pinctrl for i2c bus recovery
    Date
    From: Christoph Niedermaier <cniedermaier@dh-electronics.com>

    [ Upstream commit ddc873cd3c0af4faad6a00bffda21c3f775126dd ]

    The i2c bus can freeze at the end of transaction so the bus can no longer work.
    This scenario is improved by adding scl/sda gpios definitions to implement the
    i2c bus recovery mechanism.

    Fixes: 52c7a088badd ("ARM: dts: imx6q: Add support for the DHCOM iMX6 SoM and PDK2")
    Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
    Cc: Shawn Guo <shawnguo@kernel.org>
    Cc: Fabio Estevam <festevam@gmail.com>
    Cc: Marek Vasut <marex@denx.de>
    Cc: NXP Linux Team <linux-imx@nxp.com>
    Cc: kernel@dh-electronics.com
    To: linux-arm-kernel@lists.infradead.org
    Signed-off-by: Shawn Guo <shawnguo@kernel.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    arch/arm/boot/dts/imx6q-dhcom-som.dtsi | 36 +++++++++++++++++++++++---
    1 file changed, 33 insertions(+), 3 deletions(-)

    diff --git a/arch/arm/boot/dts/imx6q-dhcom-som.dtsi b/arch/arm/boot/dts/imx6q-dhcom-som.dtsi
    index 6c08ef354a39..d5161c34a4b1 100644
    --- a/arch/arm/boot/dts/imx6q-dhcom-som.dtsi
    +++ b/arch/arm/boot/dts/imx6q-dhcom-som.dtsi
    @@ -106,22 +106,31 @@

    &i2c1 {
    clock-frequency = <100000>;
    - pinctrl-names = "default";
    + pinctrl-names = "default", "gpio";
    pinctrl-0 = <&pinctrl_i2c1>;
    + pinctrl-1 = <&pinctrl_i2c1_gpio>;
    + scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
    + sda-gpios = <&gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
    status = "okay";
    };

    &i2c2 {
    clock-frequency = <100000>;
    - pinctrl-names = "default";
    + pinctrl-names = "default", "gpio";
    pinctrl-0 = <&pinctrl_i2c2>;
    + pinctrl-1 = <&pinctrl_i2c2_gpio>;
    + scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
    + sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
    status = "okay";
    };

    &i2c3 {
    clock-frequency = <100000>;
    - pinctrl-names = "default";
    + pinctrl-names = "default", "gpio";
    pinctrl-0 = <&pinctrl_i2c3>;
    + pinctrl-1 = <&pinctrl_i2c3_gpio>;
    + scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
    + sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
    status = "okay";

    ltc3676: pmic@3c {
    @@ -287,6 +296,13 @@
    >;
    };

    + pinctrl_i2c1_gpio: i2c1-gpio-grp {
    + fsl,pins = <
    + MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x4001b8b1
    + MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x4001b8b1
    + >;
    + };
    +
    pinctrl_i2c2: i2c2-grp {
    fsl,pins = <
    MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
    @@ -294,6 +310,13 @@
    >;
    };

    + pinctrl_i2c2_gpio: i2c2-gpio-grp {
    + fsl,pins = <
    + MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b8b1
    + MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b8b1
    + >;
    + };
    +
    pinctrl_i2c3: i2c3-grp {
    fsl,pins = <
    MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
    @@ -301,6 +324,13 @@
    >;
    };

    + pinctrl_i2c3_gpio: i2c3-gpio-grp {
    + fsl,pins = <
    + MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x4001b8b1
    + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b8b1
    + >;
    + };
    +
    pinctrl_pmic_hw300: pmic-hw300-grp {
    fsl,pins = <
    MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1B0B0
    --
    2.30.2


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