Messages in this thread | | | Subject | Re: [PATCH 3/8] i2c: mediatek: fixing the incorrect register offset | From | Kewei Xu <> | Date | Fri, 16 Jul 2021 17:09:52 +0800 |
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On Thu, 2021-07-15 at 13:23 +0800, Chen-Yu Tsai wrote: > Hi, > > On Thu, Jul 15, 2021 at 10:31 AM Kewei Xu <kewei.xu@mediatek.com> wrote: > > > > The reason for the modification here is that the previous > > offset information is incorrect, OFFSET_DEBUGSTAT = 0xE4 is > > the correct value. > > > > Signed-off-by: Kewei Xu <kewei.xu@mediatek.com> > > This needs a fixes tag: > > Fixes: 25708278f810 ("i2c: mediatek: Add i2c support for MediaTek MT8183") > > Otherwise, > > Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Hi Chen-Yu,
OK, I will resubmit a patch to add a fixes tag.
thanks Kewei
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