Messages in this thread Patch in this message | | | From | laurentiu.tudor@nxp ... | Subject | [PATCH 3/8] bus: fsl-mc: fully resume the firmware | Date | Thu, 15 Jul 2021 17:07:13 +0300 |
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From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
The MC firmware has two execution units. Resume them both, as on some Layerscape SoCs not doing so breaks the firmware.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> --- drivers/bus/fsl-mc/fsl-mc-bus.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/bus/fsl-mc/fsl-mc-bus.c b/drivers/bus/fsl-mc/fsl-mc-bus.c index ffd7a1ff957a..2341de6bce67 100644 --- a/drivers/bus/fsl-mc/fsl-mc-bus.c +++ b/drivers/bus/fsl-mc/fsl-mc-bus.c @@ -63,6 +63,7 @@ struct fsl_mc_addr_translation_range { #define FSL_MC_GCR1 0x0 #define GCR1_P1_STOP BIT(31) +#define GCR1_P2_STOP BIT(30) #define FSL_MC_FAPR 0x28 #define MC_FAPR_PL BIT(18) @@ -1118,7 +1119,8 @@ static int fsl_mc_bus_probe(struct platform_device *pdev) * At this point MC should have all its SMMU setup done so make * sure it is resumed. */ - writel(readl(mc->fsl_mc_regs + FSL_MC_GCR1) & (~GCR1_P1_STOP), + writel(readl(mc->fsl_mc_regs + FSL_MC_GCR1) & + (~(GCR1_P1_STOP | GCR1_P2_STOP)), mc->fsl_mc_regs + FSL_MC_GCR1); } -- 2.17.1
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