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    Subject[PATCH 5.12 189/242] arm64: tlb: fix the TTL value of tlb_get_level
    Date
    From: Zhenyu Ye <yezhenyu2@huawei.com>

    commit 52218fcd61cb42bde0d301db4acb3ffdf3463cc7 upstream.

    The TTL field indicates the level of page table walk holding the *leaf*
    entry for the address being invalidated. But currently, the TTL field
    may be set to an incorrent value in the following stack:

    pte_free_tlb
    __pte_free_tlb
    tlb_remove_table
    tlb_table_invalidate
    tlb_flush_mmu_tlbonly
    tlb_flush

    In this case, we just want to flush a PTE page, but the tlb->cleared_pmds
    is set and we get tlb_level = 2 in the tlb_get_level() function. This may
    cause some unexpected problems.

    This patch set the TTL field to 0 if tlb->freed_tables is set. The
    tlb->freed_tables indicates page table pages are freed, not the leaf
    entry.

    Cc: <stable@vger.kernel.org> # 5.9.x
    Fixes: c4ab2cbc1d87 ("arm64: tlb: Set the TTL field in flush_tlb_range")
    Acked-by: Catalin Marinas <catalin.marinas@arm.com>
    Reported-by: ZhuRui <zhurui3@huawei.com>
    Signed-off-by: Zhenyu Ye <yezhenyu2@huawei.com>
    Link: https://lore.kernel.org/r/b80ead47-1f88-3a00-18e1-cacc22f54cc4@huawei.com
    Signed-off-by: Will Deacon <will@kernel.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    arch/arm64/include/asm/tlb.h | 4 ++++
    1 file changed, 4 insertions(+)

    --- a/arch/arm64/include/asm/tlb.h
    +++ b/arch/arm64/include/asm/tlb.h
    @@ -28,6 +28,10 @@ static void tlb_flush(struct mmu_gather
    */
    static inline int tlb_get_level(struct mmu_gather *tlb)
    {
    + /* The TTL field is only valid for the leaf entry. */
    + if (tlb->freed_tables)
    + return 0;
    +
    if (tlb->cleared_ptes && !(tlb->cleared_pmds ||
    tlb->cleared_puds ||
    tlb->cleared_p4ds))

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