Messages in this thread | | | Subject | Re: [PATCH 1/2] spi: cadence-quadspi: Disable Auto-HW polling | From | Apurva Nandan <> | Date | Wed, 14 Jul 2021 23:21:59 +0530 |
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On 14-Jul-21 9:58 PM, Mark Brown wrote: > On Wed, Jul 14, 2021 at 06:52:12PM +0530, Nandan, Apurva wrote: >> On 13-Jul-21 11:55 PM, Mark Brown wrote: >>> On Tue, Jul 13, 2021 at 12:57:41PM +0000, Apurva Nandan wrote: > >>>> cadence-quadspi controller doesn't allow an address phase when >>>> auto-polling the busy bit on the status register. Unlike SPI NOR > >>> Would it not be better to only disable this on NAND rather than >>> disabling it completely? > >> I am not sure how it is possible currently in the controller, could you >> please suggest a way? Also, should we have this logic of checking flash >> device type in the cadence-quadspi controller? SPI controller should be >> generic to all flash cores right? > > Surely the controller can tell if an address phase (or other unsupported > feature) is present? >
Yeah sure, understood.
>> In my opinion, it shouldn't harm as spi-nor core doesn't depend on HW >> polling anyways and auto-HW polling is a minor overhead. > > Flash stuff seems to quite often end up happening when the system is > heavily loaded for other reasons, it's much more of an issue with things > that are done more with PIO but still seems useful to avoid having to > poll in software, either it'll reduce CPU load or reduce latency and > increase throughput. >
Yes, got the point. Will amend it.
Thanks, Apurva Nandan
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