Messages in this thread Patch in this message | | | From | Kewei Xu <> | Subject | [PATCH 3/8] i2c: mediatek: fixing the incorrect register offset | Date | Thu, 15 Jul 2021 10:29:12 +0800 |
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The reason for the modification here is that the previous offset information is incorrect, OFFSET_DEBUGSTAT = 0xE4 is the correct value.
Signed-off-by: Kewei Xu <kewei.xu@mediatek.com> --- drivers/i2c/busses/i2c-mt65xx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c index 64acd96..e65a41e 100644 --- a/drivers/i2c/busses/i2c-mt65xx.c +++ b/drivers/i2c/busses/i2c-mt65xx.c @@ -195,7 +195,7 @@ enum I2C_REGS_OFFSET { [OFFSET_SOFTRESET] = 0x50, [OFFSET_MULTI_DMA] = 0x84, [OFFSET_SCL_MIS_COMP_POINT] = 0x90, - [OFFSET_DEBUGSTAT] = 0xe0, + [OFFSET_DEBUGSTAT] = 0xe4, [OFFSET_DEBUGCTRL] = 0xe8, [OFFSET_FIFO_STAT] = 0xf4, [OFFSET_FIFO_THRESH] = 0xf8, -- 1.9.1
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