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    Subject[PATCH 5.13 607/800] serial: fsl_lpuart: dont modify arbitrary data on lpuart32
    Date
    From: Michael Walle <michael@walle.cc>

    [ Upstream commit ccf08fd1204bcb5311cc10aea037c71c6e74720a ]

    lpuart_rx_dma_startup() is used for both the 8 bit and the 32 bit
    version of the LPUART. Modify the UARTCR only for the 8 bit version.

    Fixes: f4eef224a09f ("serial: fsl_lpuart: add sysrq support when using dma")
    Signed-off-by: Michael Walle <michael@walle.cc>
    Link: https://lore.kernel.org/r/20210512141255.18277-2-michael@walle.cc
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/tty/serial/fsl_lpuart.c | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
    index 794035041744..fbf2e4d2d22b 100644
    --- a/drivers/tty/serial/fsl_lpuart.c
    +++ b/drivers/tty/serial/fsl_lpuart.c
    @@ -1625,7 +1625,7 @@ static void lpuart_rx_dma_startup(struct lpuart_port *sport)
    sport->lpuart_dma_rx_use = true;
    rx_dma_timer_init(sport);

    - if (sport->port.has_sysrq) {
    + if (sport->port.has_sysrq && !lpuart_is_32(sport)) {
    cr3 = readb(sport->port.membase + UARTCR3);
    cr3 |= UARTCR3_FEIE;
    writeb(cr3, sport->port.membase + UARTCR3);
    --
    2.30.2


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