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    Subject[PATCH 5.13 703/800] mtd: spi-nor: otp: fix access to security registers in 4 byte mode
    Date
    From: Michael Walle <michael@walle.cc>

    [ Upstream commit b97b1a769849beb6b40b740817b06f1a50e1c589 ]

    The security registers either take a 3 byte or a 4 byte address offset,
    depending on the address mode of the flash. Thus just leave the
    nor->addr_width as is.

    Fixes: cad3193fe9d1 ("mtd: spi-nor: implement OTP support for Winbond and similar flashes")
    Signed-off-by: Michael Walle <michael@walle.cc>
    Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
    Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
    Acked-by: Pratyush Yadav <p.yadav@ti.com>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/mtd/spi-nor/otp.c | 2 --
    1 file changed, 2 deletions(-)

    diff --git a/drivers/mtd/spi-nor/otp.c b/drivers/mtd/spi-nor/otp.c
    index fcf38d260345..5c51a2c9be61 100644
    --- a/drivers/mtd/spi-nor/otp.c
    +++ b/drivers/mtd/spi-nor/otp.c
    @@ -40,7 +40,6 @@ int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf)
    rdesc = nor->dirmap.rdesc;

    nor->read_opcode = SPINOR_OP_RSECR;
    - nor->addr_width = 3;
    nor->read_dummy = 8;
    nor->read_proto = SNOR_PROTO_1_1_1;
    nor->dirmap.rdesc = NULL;
    @@ -84,7 +83,6 @@ int spi_nor_otp_write_secr(struct spi_nor *nor, loff_t addr, size_t len,
    wdesc = nor->dirmap.wdesc;

    nor->program_opcode = SPINOR_OP_PSECR;
    - nor->addr_width = 3;
    nor->write_proto = SNOR_PROTO_1_1_1;
    nor->dirmap.wdesc = NULL;

    --
    2.30.2


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