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Subject[PATCH v22 08/18] dt-binding: memory: pl353-smc: Enhance the description of the reg property
Date
The SMC bus controller features several register sets. The one pointed
by the reg property is for the SMC configuration (impacts the
sub-controllers configuration), while the others are meant to be used to
send regular cycles on the memory bus (eg. CMD, ADDR, DATA for a NAND
device). Detail this a little bit for the sake of clarity.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
.../devicetree/bindings/memory-controllers/pl353-smc.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
index ecd46856f139..ba6a5426f62b 100644
--- a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
@@ -5,7 +5,8 @@ of memory interfaces: NAND and memory mapped interfaces (such as SRAM or NOR).

Required properties:
- compatible : Should be "arm,pl353-smc-r2p1", "arm,primecell".
-- reg : Controller registers map and length.
+- reg : SMC controller and sub-controllers configuration
+ registers.
- clock-names : List of input clock names - "memclk", "apb_pclk"
(See clock bindings for details).
- clocks : Clock phandles (see clock bindings for details).
--
2.27.0
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