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SubjectRe: [PATCH 1/2] KVM: LAPIC: write 0 to TMICT should also cancel vmx-preemption timer
On Thu, Jun 03, 2021, Wanpeng Li wrote:
> From: Wanpeng Li <wanpengli@tencent.com>
>
> According to the SDM 10.5.4.1:
>
> A write of 0 to the initial-count register effectively stops the local
> APIC timer, in both one-shot and periodic mode.
>
> The lapic timer oneshot/periodic mode which is emulated by vmx-preemption
> timer doesn't stop since vmx->hv_deadline_tsc is still set.

But the VMX preemption timer is only used for deadline, never for oneshot or
periodic. Am I missing something?

static bool start_hv_timer(struct kvm_lapic *apic)
{
struct kvm_timer *ktimer = &apic->lapic_timer;
struct kvm_vcpu *vcpu = apic->vcpu;
bool expired;

WARN_ON(preemptible());
if (!kvm_can_use_hv_timer(vcpu))
return false;

if (!ktimer->tscdeadline) <-------
return false;

...
}

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