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    Subject[PATCH 5.10 058/101] pinctrl: stm32: fix the reported number of GPIO lines per bank
    Date
    From: Fabien Dessenne <fabien.dessenne@foss.st.com>

    [ Upstream commit 67e2996f72c71ebe4ac2fcbcf77e54479bb7aa11 ]

    Each GPIO bank supports a variable number of lines which is usually 16, but
    is less in some cases : this is specified by the last argument of the
    "gpio-ranges" bank node property.
    Report to the framework, the actual number of lines, so the libgpiod
    gpioinfo command lists the actually existing GPIO lines.

    Fixes: 1dc9d289154b ("pinctrl: stm32: add possibility to use gpio-ranges to declare bank range")
    Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
    Link: https://lore.kernel.org/r/20210617144629.2557693-1-fabien.dessenne@foss.st.com
    Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/pinctrl/stm32/pinctrl-stm32.c | 9 +++++++--
    1 file changed, 7 insertions(+), 2 deletions(-)

    diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c
    index 7d9bdedcd71b..3af4430543dc 100644
    --- a/drivers/pinctrl/stm32/pinctrl-stm32.c
    +++ b/drivers/pinctrl/stm32/pinctrl-stm32.c
    @@ -1229,7 +1229,7 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
    struct device *dev = pctl->dev;
    struct resource res;
    int npins = STM32_GPIO_PINS_PER_BANK;
    - int bank_nr, err;
    + int bank_nr, err, i = 0;

    if (!IS_ERR(bank->rstc))
    reset_control_deassert(bank->rstc);
    @@ -1251,9 +1251,14 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,

    of_property_read_string(np, "st,bank-name", &bank->gpio_chip.label);

    - if (!of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, &args)) {
    + if (!of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, i, &args)) {
    bank_nr = args.args[1] / STM32_GPIO_PINS_PER_BANK;
    bank->gpio_chip.base = args.args[1];
    +
    + npins = args.args[2];
    + while (!of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3,
    + ++i, &args))
    + npins += args.args[2];
    } else {
    bank_nr = pctl->nbanks;
    bank->gpio_chip.base = bank_nr * STM32_GPIO_PINS_PER_BANK;
    --
    2.30.2
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