Messages in this thread | | | Subject | Re: [PATCH v1] arm64: tlb: fix the TTL value of tlb_get_level | From | Zhenyu Ye <> | Date | Thu, 24 Jun 2021 09:55:53 +0800 |
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On 2021/6/23 19:04, Will Deacon wrote: > On Wed, Jun 23, 2021 at 03:05:22PM +0800, Zhenyu Ye wrote: >> diff --git a/arch/arm64/include/asm/tlb.h b/arch/arm64/include/asm/tlb.h >> index 61c97d3b58c7..c995d1f4594f 100644 >> --- a/arch/arm64/include/asm/tlb.h >> +++ b/arch/arm64/include/asm/tlb.h >> @@ -28,6 +28,10 @@ static void tlb_flush(struct mmu_gather *tlb); >> */ >> static inline int tlb_get_level(struct mmu_gather *tlb) >> { >> + /* The TTL field is only valid for the leaf entry. */ >> + if (tlb->freed_tables) >> + return 0; >> + >> if (tlb->cleared_ptes && !(tlb->cleared_pmds || >> tlb->cleared_puds || >> tlb->cleared_p4ds)) > > Thanks. I can't see a better way around this, so I'll queue the patch. > The stage-2 page-table code looks ok afaict, but please can you check it > too?
The stage-2 page-table codes seem to be correct to me.
Thanks, Zhenyu
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