Messages in this thread Patch in this message | | | From | Joerg Roedel <> | Subject | [PATCH 1/3] x86/sev: Add Comments to existing GHCB MSR protocol defines | Date | Tue, 22 Jun 2021 16:48:23 +0200 |
| |
From: Joerg Roedel <jroedel@suse.de>
Add comments to the defines for SEV Info and CPUID MSR protocol defines to document to which protocol part they belong.
Signed-off-by: Joerg Roedel <jroedel@suse.de> --- arch/x86/include/asm/sev-common.h | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/x86/include/asm/sev-common.h b/arch/x86/include/asm/sev-common.h index 629c3df243f0..1cc9e7dd8107 100644 --- a/arch/x86/include/asm/sev-common.h +++ b/arch/x86/include/asm/sev-common.h @@ -11,6 +11,7 @@ #define GHCB_MSR_INFO_POS 0 #define GHCB_MSR_INFO_MASK (BIT_ULL(12) - 1) +/* SEV Information Request/Response */ #define GHCB_MSR_SEV_INFO_RESP 0x001 #define GHCB_MSR_SEV_INFO_REQ 0x002 #define GHCB_MSR_VER_MAX_POS 48 @@ -28,6 +29,7 @@ #define GHCB_MSR_PROTO_MAX(v) (((v) >> GHCB_MSR_VER_MAX_POS) & GHCB_MSR_VER_MAX_MASK) #define GHCB_MSR_PROTO_MIN(v) (((v) >> GHCB_MSR_VER_MIN_POS) & GHCB_MSR_VER_MIN_MASK) +/* CPUID Request/Response */ #define GHCB_MSR_CPUID_REQ 0x004 #define GHCB_MSR_CPUID_RESP 0x005 #define GHCB_MSR_CPUID_FUNC_POS 32 -- 2.31.1
| |